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authorStefan Roese <sr@denx.de>2009-09-24 09:55:50 +0200
committerStefan Roese <sr@denx.de>2009-09-28 10:45:42 +0200
commit952e7760bfc5b0e3b142b9ce34e7fbb7d008c900 (patch)
treeabd867c1a44dbc20bbd970c36c76f0355adc6df4 /cpu
parent984f10baac8ef6032df52f135943d6b0bc96f724 (diff)
downloadblackbird-obmc-uboot-952e7760bfc5b0e3b142b9ce34e7fbb7d008c900.tar.gz
blackbird-obmc-uboot-952e7760bfc5b0e3b142b9ce34e7fbb7d008c900.zip
ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines. This patch now changes lower case UIC defines to upper case. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ppc4xx/uic.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/cpu/ppc4xx/uic.c b/cpu/ppc4xx/uic.c
index d298b312ce..8b1b259faf 100644
--- a/cpu/ppc4xx/uic.c
+++ b/cpu/ppc4xx/uic.c
@@ -109,7 +109,7 @@ void external_interrupt(struct pt_regs *regs)
/*
* Read masked interrupt status register to determine interrupt source
*/
- uic_msr = mfdcr(uic0msr);
+ uic_msr = mfdcr(UIC0MSR);
#if (UIC_MAX > 1)
if ((UIC_MASK(VECNUM_UIC1CI) & uic_msr) ||
@@ -129,7 +129,7 @@ void external_interrupt(struct pt_regs *regs)
uic_interrupt(UIC3_DCR_BASE, 96);
#endif
- mtdcr(uic0sr, (uic_msr & UICB0_ALL));
+ mtdcr(UIC0SR, (uic_msr & UICB0_ALL));
if (uic_msr & ~(UICB0_ALL))
uic_interrupt(UIC0_DCR_BASE, 0);
@@ -140,13 +140,13 @@ void external_interrupt(struct pt_regs *regs)
void pic_irq_ack(unsigned int vec)
{
if ((vec >= 0) && (vec < 32))
- mtdcr(uicsr, UIC_MASK(vec));
+ mtdcr(UIC0SR, UIC_MASK(vec));
else if ((vec >= 32) && (vec < 64))
- mtdcr(uic1sr, UIC_MASK(vec));
+ mtdcr(UIC1SR, UIC_MASK(vec));
else if ((vec >= 64) && (vec < 96))
- mtdcr(uic2sr, UIC_MASK(vec));
+ mtdcr(UIC2SR, UIC_MASK(vec));
else if (vec >= 96)
- mtdcr(uic3sr, UIC_MASK(vec));
+ mtdcr(UIC3SR, UIC_MASK(vec));
}
/*
@@ -156,13 +156,13 @@ void pic_irq_enable(unsigned int vec)
{
if ((vec >= 0) && (vec < 32))
- mtdcr(uicer, mfdcr(uicer) | UIC_MASK(vec));
+ mtdcr(UIC0ER, mfdcr(UIC0ER) | UIC_MASK(vec));
else if ((vec >= 32) && (vec < 64))
- mtdcr(uic1er, mfdcr(uic1er) | UIC_MASK(vec));
+ mtdcr(UIC1ER, mfdcr(UIC1ER) | UIC_MASK(vec));
else if ((vec >= 64) && (vec < 96))
- mtdcr(uic2er, mfdcr(uic2er) | UIC_MASK(vec));
+ mtdcr(UIC2ER, mfdcr(UIC2ER) | UIC_MASK(vec));
else if (vec >= 96)
- mtdcr(uic3er, mfdcr(uic3er) | UIC_MASK(vec));
+ mtdcr(UIC3ER, mfdcr(UIC3ER) | UIC_MASK(vec));
debug("Install interrupt vector %d\n", vec);
}
@@ -170,11 +170,11 @@ void pic_irq_enable(unsigned int vec)
void pic_irq_disable(unsigned int vec)
{
if ((vec >= 0) && (vec < 32))
- mtdcr(uicer, mfdcr(uicer) & ~UIC_MASK(vec));
+ mtdcr(UIC0ER, mfdcr(UIC0ER) & ~UIC_MASK(vec));
else if ((vec >= 32) && (vec < 64))
- mtdcr(uic1er, mfdcr(uic1er) & ~UIC_MASK(vec));
+ mtdcr(UIC1ER, mfdcr(UIC1ER) & ~UIC_MASK(vec));
else if ((vec >= 64) && (vec < 96))
- mtdcr(uic2er, mfdcr(uic2er) & ~UIC_MASK(vec));
+ mtdcr(UIC2ER, mfdcr(UIC2ER) & ~UIC_MASK(vec));
else if (vec >= 96)
- mtdcr(uic3er, mfdcr(uic3er) & ~UIC_MASK(vec));
+ mtdcr(UIC3ER, mfdcr(UIC3ER) & ~UIC_MASK(vec));
}
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