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| author | Stefan Roese <sr@denx.de> | 2008-08-21 11:05:03 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-08-21 11:05:03 +0200 |
| commit | f556483734126793522fb7a8cf36af90da78f084 (patch) | |
| tree | c872485b1c83e4c941ad674487a4e60acc6881ae /cpu/ppc4xx/cpu_init.c | |
| parent | 079589bcfb24ba11068460276a3cc9549ab5346f (diff) | |
| download | blackbird-obmc-uboot-f556483734126793522fb7a8cf36af90da78f084.tar.gz blackbird-obmc-uboot-f556483734126793522fb7a8cf36af90da78f084.zip | |
ppc4xx: Cleanup of "ppc4xx: Optimize PLB4 Arbiter..." patch
This patch fixes some minor issues introduced with the patch:
ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika:
- Rework memory-queue and PLB arbiter optimization code, that the
local variable is not needed anymore. This removes one #ifdef.
- Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead
of XXX+ 0x01). This was not introduced by Prodyut, just a
copy-paste problem.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/cpu_init.c')
| -rw-r--r-- | cpu/ppc4xx/cpu_init.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index 281819af60..dee9807717 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -138,9 +138,7 @@ void reconfigure_pll(u32 new_cpu_freq) void cpu_init_f (void) { -#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || defined(CONFIG_460EX) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPE) || defined(CONFIG_405EX) || \ - defined(CONFIG_460GT) || defined(CONFIG_460SX) +#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || defined(CONFIG_460EX) u32 val; #endif @@ -304,16 +302,17 @@ cpu_init_f (void) mtsdr(SDR0_USB2HOST_CFG, val); #endif /* CONFIG_460EX */ -#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ +#if defined(CONFIG_405EX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ - defined(CONFIG_405EX) || defined(CONFIG_460SX) + defined(CONFIG_460SX) /* * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read */ - val = (mfdcr(plb0_acr) & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep; - mtdcr(plb0_acr, val); - val = (mfdcr(plb1_acr) & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep; - mtdcr(plb1_acr, val); + mtdcr(plb0_acr, (mfdcr(plb0_acr) & ~plb0_acr_rdp_mask) | + plb0_acr_rdp_4deep); + mtdcr(plb1_acr, (mfdcr(plb1_acr) & ~plb1_acr_rdp_mask) | + plb1_acr_rdp_4deep); #endif /* CONFIG_440SP/SPE || CONFIG_460EX/GT || CONFIG_405EX */ } |
