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| author | Lokesh Vutla <lokeshvutla@ti.com> | 2016-05-23 13:31:19 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-05-27 15:47:57 -0400 |
| commit | 9b77b19178446393fce2e74554815c17454f8da8 (patch) | |
| tree | 72bf8dd28d739040e0829f59617dad0a6149c127 /configs/socfpga_sr1500_defconfig | |
| parent | 87c2f76f3fae11bf559996505e23b37d03f4c5dc (diff) | |
| download | blackbird-obmc-uboot-9b77b19178446393fce2e74554815c17454f8da8.tar.gz blackbird-obmc-uboot-9b77b19178446393fce2e74554815c17454f8da8.zip | |
ARM: OMAP4+: Fix DPLL programming sequence
All the output clock parameters of a DPLL needs to be programmed before
locking the DPLL. But it is being configured after locking the DPLL which
could potentially bypass DPLL. So fixing this sequence.
Reported-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'configs/socfpga_sr1500_defconfig')
0 files changed, 0 insertions, 0 deletions
