summaryrefslogtreecommitdiffstats
path: root/board/w7o
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2009-09-24 09:55:50 +0200
committerStefan Roese <sr@denx.de>2009-09-28 10:45:42 +0200
commit952e7760bfc5b0e3b142b9ce34e7fbb7d008c900 (patch)
treeabd867c1a44dbc20bbd970c36c76f0355adc6df4 /board/w7o
parent984f10baac8ef6032df52f135943d6b0bc96f724 (diff)
downloadblackbird-obmc-uboot-952e7760bfc5b0e3b142b9ce34e7fbb7d008c900.tar.gz
blackbird-obmc-uboot-952e7760bfc5b0e3b142b9ce34e7fbb7d008c900.zip
ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines. This patch now changes lower case UIC defines to upper case. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/w7o')
-rw-r--r--board/w7o/w7o.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c
index 6479beeb13..00a9f98b44 100644
--- a/board/w7o/w7o.c
+++ b/board/w7o/w7o.c
@@ -64,16 +64,16 @@ int board_early_init_f (void)
* IRQ 30 (EXT IRQ 5) Level One PHY; active low; level sensitive
* IRQ 31 (EXT IRQ 6) SAM 1; active high; level sensitive
*/
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
+ mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (UIC0ER, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,
+ mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
+ mtdcr (UIC0PR, 0xFFFFFF80); /* set int polarities */
+ mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
+ mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,
INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
#elif defined(CONFIG_W7OLMC)
/*
@@ -95,16 +95,16 @@ int board_early_init_f (void)
* IRQ 30 (EXT IRQ 5) RCMM Reset; active low; level sensitive
* IRQ 31 (EXT IRQ 6) PHY; active high; level sensitive
*/
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
+ mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (UIC0ER, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,
+ mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
+ mtdcr (UIC0PR, 0xFFFFFF80); /* set int polarities */
+ mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
+ mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,
INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
#else /* Unknown */
# error "Unknown W7O board configuration"
OpenPOWER on IntegriCloud