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authorwdenk <wdenk>2003-06-19 23:01:32 +0000
committerwdenk <wdenk>2003-06-19 23:01:32 +0000
commit48b42616e928ce6eacfe20276a1614e2b27ac4b5 (patch)
tree0c194fbd1059185f158c0b37dc3c846b50c2ee2f /board/trab
parent15ef8a5d17181ea376fac94579dce0af1cfcdeb7 (diff)
downloadblackbird-obmc-uboot-48b42616e928ce6eacfe20276a1614e2b27ac4b5.tar.gz
blackbird-obmc-uboot-48b42616e928ce6eacfe20276a1614e2b27ac4b5.zip
* Patches by David Müller, 12 Jun 2003:
- rewrite of the S3C24X0 register definitions stuff - "driver" for the built-in S3C24X0 RTC * Patches by Yuli Barcohen, 12 Jun 2003: - Add MII support and Ethernet PHY initialization for MPC8260ADS board - Fix incorrect SIUMCR initialisation caused by wrong Hard Reset configuration word supplied by FPGA on some MPC8260ADS boards * Patch by Pantelis Antoniou, 10 Jun 2003: Unify status LED interface
Diffstat (limited to 'board/trab')
-rw-r--r--board/trab/trab.c84
-rw-r--r--board/trab/vfd.c93
2 files changed, 101 insertions, 76 deletions
diff --git a/board/trab/trab.c b/board/trab/trab.c
index 6c9971f3b6..dd4105d97d 100644
--- a/board/trab/trab.c
+++ b/board/trab/trab.c
@@ -71,37 +71,39 @@ int board_init ()
extern int vfd_init_clocks(void);
#endif
DECLARE_GLOBAL_DATA_PTR;
+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
/* memory and cpu-speed are setup before relocation */
#ifdef CONFIG_TRAB_50MHZ
/* change the clock to be 50 MHz 1:1:1 */
/* MDIV:0x5c PDIV:4 SDIV:2 */
- rMPLLCON = 0x5c042;
- rCLKDIVN = 0;
+ clk_power->MPLLCON = 0x5c042;
+ clk_power->CLKDIVN = 0;
#else
/* change the clock to be 133 MHz 1:2:4 */
/* MDIV:0x7d PDIV:4 SDIV:1 */
- rMPLLCON = 0x7d041;
- rCLKDIVN = 3;
+ clk_power->MPLLCON = 0x7d041;
+ clk_power->CLKDIVN = 3;
#endif
/* set up the I/O ports */
- rPACON = 0x3ffff;
- rPBCON = 0xaaaaaaaa;
- rPBUP = 0xffff;
+ gpio->PACON = 0x3ffff;
+ gpio->PBCON = 0xaaaaaaaa;
+ gpio->PBUP = 0xffff;
/* INPUT nCTS0 nRTS0 TXD[1] TXD[0] RXD[1] RXD[0] */
/* 00, 10, 10, 10, 10, 10, 10 */
- rPFCON = (2<<0) | (2<<2) | (2<<4) | (2<<6) | (2<<8) | (2<<10);
+ gpio->PFCON = (2<<0) | (2<<2) | (2<<4) | (2<<6) | (2<<8) | (2<<10);
#ifdef CONFIG_HWFLOW
/* do not pull up RXD0, RXD1, TXD0, TXD1, CTS0, RTS0 */
- rPFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5);
+ gpio->PFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5);
#else
/* do not pull up RXD0, RXD1, TXD0, TXD1 */
- rPFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3);
+ gpio->PFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3);
#endif
- rPGCON = 0x0;
- rPGUP = 0x0;
- rOPENCR= 0x0;
+ gpio->PGCON = 0x0;
+ gpio->PGUP = 0x0;
+ gpio->OPENCR= 0x0;
/* arch number of SAMSUNG-Board */
/* MACH_TYPE_SMDK2400 */
@@ -112,8 +114,8 @@ int board_init ()
gd->bd->bi_boot_params = 0x0c000100;
/* Make sure both buzzers are turned off */
- rPDCON |= 0x5400;
- rPDDAT &= ~0xE0;
+ gpio->PDCON |= 0x5400;
+ gpio->PDDAT &= ~0xE0;
#ifdef CONFIG_VFD
vfd_init_clocks();
@@ -305,57 +307,73 @@ static int key_pressed(void)
#ifdef CFG_BRIGHTNESS
-#define SET_CS_TOUCH (rPDDAT &= 0x5FF)
-#define CLR_CS_TOUCH (rPDDAT |= 0x200)
+static inline void SET_CS_TOUCH(void)
+{
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+
+ gpio->PDDAT &= 0x5FF;
+}
+
+static inline void CLR_CS_TOUCH(void)
+{
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+
+ gpio->PDDAT |= 0x200;
+}
static void spi_init(void)
{
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+ S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
int i;
/* Configure I/O ports. */
- rPDCON = (rPDCON & 0xF3FFFF) | 0x040000;
- rPGCON = (rPGCON & 0x0F3FFF) | 0x008000;
- rPGCON = (rPGCON & 0x0CFFFF) | 0x020000;
- rPGCON = (rPGCON & 0x03FFFF) | 0x080000;
+ gpio->PDCON = (gpio->PDCON & 0xF3FFFF) | 0x040000;
+ gpio->PGCON = (gpio->PGCON & 0x0F3FFF) | 0x008000;
+ gpio->PGCON = (gpio->PGCON & 0x0CFFFF) | 0x020000;
+ gpio->PGCON = (gpio->PGCON & 0x03FFFF) | 0x080000;
- CLR_CS_TOUCH;
+ CLR_CS_TOUCH();
- rSPPRE = 0x1F; /* Baudrate ca. 514kHz */
- rSPPIN = 0x01; /* SPI-MOSI holds Level after last bit */
- rSPCON = 0x1A; /* Polling, Prescaler, Master, CPOL=0, CPHA=1 */
+ spi->ch[0].SPPRE = 0x1F; /* Baudrate ca. 514kHz */
+ spi->ch[0].SPPIN = 0x01; /* SPI-MOSI holds Level after last bit */
+ spi->ch[0].SPCON = 0x1A; /* Polling, Prescaler, Master, CPOL=0, CPHA=1 */
/* Dummy byte ensures clock to be low. */
for (i = 0; i < 10; i++) {
- rSPTDAT = 0xFF;
+ spi->ch[0].SPTDAT = 0xFF;
}
wait_transmit_done();
}
static void wait_transmit_done(void)
{
- while (!(rSPSTA & 0x01)); /* wait until transfer is done */
+ S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
+
+ while (!(spi->ch[0].SPSTA & 0x01)); /* wait until transfer is done */
}
static void tsc2000_write(unsigned int page, unsigned int reg,
unsigned int data)
{
+ S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
unsigned int command;
- SET_CS_TOUCH;
+ SET_CS_TOUCH();
command = 0x0000;
command |= (page << 11);
command |= (reg << 5);
- rSPTDAT = (command & 0xFF00) >> 8;
+ spi->ch[0].SPTDAT = (command & 0xFF00) >> 8;
wait_transmit_done();
- rSPTDAT = (command & 0x00FF);
+ spi->ch[0].SPTDAT = (command & 0x00FF);
wait_transmit_done();
- rSPTDAT = (data & 0xFF00) >> 8;
+ spi->ch[0].SPTDAT = (data & 0xFF00) >> 8;
wait_transmit_done();
- rSPTDAT = (data & 0x00FF);
+ spi->ch[0].SPTDAT = (data & 0x00FF);
wait_transmit_done();
- CLR_CS_TOUCH;
+ CLR_CS_TOUCH();
}
static void tsc2000_set_brightness(void)
diff --git a/board/trab/vfd.c b/board/trab/vfd.c
index e00294f0fe..1abc2adc65 100644
--- a/board/trab/vfd.c
+++ b/board/trab/vfd.c
@@ -359,14 +359,17 @@ void transfer_pic(int display, unsigned char *adr, int height, int width)
*/
int vfd_init_clocks (void)
{
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+ S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
+ S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
/* try to determine display type from the value
* defined by pull-ups
*/
- rPCUP = (rPCUP & 0xFFF0); /* activate GPC0...GPC3 pullups */
- rPCCON = (rPCCON & 0xFFFFFF00); /* configure GPC0...GPC3 as inputs */
+ gpio->PCUP = (gpio->PCUP & 0xFFF0); /* activate GPC0...GPC3 pullups */
+ gpio->PCCON = (gpio->PCCON & 0xFFFFFF00); /* configure GPC0...GPC3 as inputs */
udelay (10); /* allow signals to settle */
- vfd_board_id = (~rPCDAT) & 0x000F; /* read GPC0...GPC3 port pins */
+ vfd_board_id = (~gpio->PCDAT) & 0x000F; /* read GPC0...GPC3 port pins */
VFD_DISABLE; /* activate blank for the vfd */
@@ -377,39 +380,39 @@ int vfd_init_clocks (void)
/* If new board revision, then use PWM 3 as cpld-clock */
/* Enable 500 Hz timer for fill level sensor to operate properly */
/* Configure TOUT3 as functional pin, disable pull-up */
- rPDCON &= ~0x30000;
- rPDCON |= 0x20000;
- rPDUP |= (1 << 8);
+ gpio->PDCON &= ~0x30000;
+ gpio->PDCON |= 0x20000;
+ gpio->PDUP |= (1 << 8);
/* Configure the prescaler */
- rTCFG0 &= ~0xff00;
- rTCFG0 |= 0x0f00;
+ timers->TCFG0 &= ~0xff00;
+ timers->TCFG0 |= 0x0f00;
/* Select MUX input (divider) for timer3 (1/16) */
- rTCFG1 &= ~0xf000;
- rTCFG1 |= 0x3000;
+ timers->TCFG1 &= ~0xf000;
+ timers->TCFG1 |= 0x3000;
/* Enable autoreload and set the counter and compare
* registers to values for the 500 Hz clock
* (for a given prescaler (15) and divider (16)):
* counter = (66000000 / 500) >> 9;
*/
- rTCNTB3 = 0x101;
- rTCMPB3 = 0x101 / 2;
+ timers->ch[3].TCNTB = 0x101;
+ timers->ch[3].TCMPB = 0x101 / 2;
/* Start timer */
- rTCON = (rTCON | UPDATE3 | RELOAD3) & ~INVERT3;
- rTCON = (rTCON | START3) & ~UPDATE3;
+ timers->TCON = (timers->TCON | UPDATE3 | RELOAD3) & ~INVERT3;
+ timers->TCON = (timers->TCON | START3) & ~UPDATE3;
}
#endif
/* If old board revision, then use vm-signal as cpld-clock */
- rLCDCON2 = 0x00FFC000;
- rLCDCON3 = 0x0007FF00;
- rLCDCON4 = 0x00000000;
- rLCDCON5 = 0x00000400;
- rLCDCON1 = 0x00000B75;
+ lcd->LCDCON2 = 0x00FFC000;
+ lcd->LCDCON3 = 0x0007FF00;
+ lcd->LCDCON4 = 0x00000000;
+ lcd->LCDCON5 = 0x00000400;
+ lcd->LCDCON1 = 0x00000B75;
/* VM (GPD1) is used as clock for the CPLD */
- rPDCON = (rPDCON & 0xFFFFFFF3) | 0x00000008;
+ gpio->PDCON = (gpio->PDCON & 0xFFFFFFF3) | 0x00000008;
return 0;
}
@@ -425,6 +428,8 @@ int vfd_init_clocks (void)
*/
int drv_vfd_init(void)
{
+ S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
char *tmp;
ulong palette;
static int vfd_init_done = 0;
@@ -481,40 +486,40 @@ int drv_vfd_init(void)
* see manual S3C2400
*/
/* Stopp LCD-Controller */
- rLCDCON1 = 0x00000000;
+ lcd->LCDCON1 = 0x00000000;
/* frame buffer startadr */
- rLCDSADDR1 = gd->fb_base >> 1;
+ lcd->LCDSADDR1 = gd->fb_base >> 1;
/* frame buffer endadr */
- rLCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1;
- rLCDSADDR3 = ((256/4));
-rLCDCON2 = 0x000DC000;
+ lcd->LCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1;
+ lcd->LCDSADDR3 = ((256/4));
+ lcd->LCDCON2 = 0x000DC000;
if(gd->vfd_type == VFD_TYPE_MN11236)
- rLCDCON2 = 37 << 14; /* MN11236: 38 lines */
+ lcd->LCDCON2 = 37 << 14; /* MN11236: 38 lines */
else
- rLCDCON2 = 55 << 14; /* T119C: 56 lines */
- rLCDCON3 = 0x0051000A;
- rLCDCON4 = 0x00000001;
+ lcd->LCDCON2 = 55 << 14; /* T119C: 56 lines */
+ lcd->LCDCON3 = 0x0051000A;
+ lcd->LCDCON4 = 0x00000001;
if (gd->vfd_type && vfd_inv_data)
- rLCDCON5 = 0x000004C0;
+ lcd->LCDCON5 = 0x000004C0;
else
- rLCDCON5 = 0x00000440;
+ lcd->LCDCON5 = 0x00000440;
/* Port pins as LCD output */
- rPCCON = (rPCCON & 0xFFFFFF00)| 0x000000AA;
- rPDCON = (rPDCON & 0xFFFFFF03)| 0x000000A8;
+ gpio->PCCON = (gpio->PCCON & 0xFFFFFF00)| 0x000000AA;
+ gpio->PDCON = (gpio->PDCON & 0xFFFFFF03)| 0x000000A8;
/* Synchronize VFD enable with LCD controller to avoid flicker */
- rLCDCON1 = 0x00000B75; /* Start LCD-Controller */
- while((rLCDCON5 & 0x180000)!=0x100000); /* Wait for end of VSYNC */
- while((rLCDCON5 & 0x060000)!=0x040000); /* Wait for next HSYNC */
- while((rLCDCON5 & 0x060000)==0x040000);
- while((rLCDCON5 & 0x060000)!=0x000000);
+ lcd->LCDCON1 = 0x00000B75; /* Start LCD-Controller */
+ while((lcd->LCDCON5 & 0x180000)!=0x100000); /* Wait for end of VSYNC */
+ while((lcd->LCDCON5 & 0x060000)!=0x040000); /* Wait for next HSYNC */
+ while((lcd->LCDCON5 & 0x060000)==0x040000);
+ while((lcd->LCDCON5 & 0x060000)!=0x000000);
if(gd->vfd_type)
VFD_ENABLE;
- debug ("LCDSADDR1: %lX\n", rLCDSADDR1);
- debug ("LCDSADDR2: %lX\n", rLCDSADDR2);
- debug ("LCDSADDR3: %lX\n", rLCDSADDR3);
+ debug ("LCDSADDR1: %lX\n", lcd->LCDSADDR1);
+ debug ("LCDSADDR2: %lX\n", lcd->LCDSADDR2);
+ debug ("LCDSADDR3: %lX\n", lcd->LCDSADDR3);
return 0;
}
@@ -525,9 +530,11 @@ rLCDCON2 = 0x000DC000;
*/
void disable_vfd (void)
{
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+
VFD_DISABLE;
- rPDCON &= ~0xC;
- rPDUP &= ~0x2;
+ gpio->PDCON &= ~0xC;
+ gpio->PDUP &= ~0x2;
}
/************************************************************************/
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