diff options
| author | York Sun <yorksun@freescale.com> | 2011-01-10 12:02:59 +0000 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-19 22:58:23 -0600 |
| commit | d2a9568c57f0aa02f097911d3811e002a1eec1b8 (patch) | |
| tree | 9cb9c95879bfbc5de66d8ff12f6179d27ae4db0d /board/tqc | |
| parent | 8ed20f2c178aa44c8e1a35703579fd63350e9f42 (diff) | |
| download | blackbird-obmc-uboot-d2a9568c57f0aa02f097911d3811e002a1eec1b8.tar.gz blackbird-obmc-uboot-d2a9568c57f0aa02f097911d3811e002a1eec1b8.zip | |
mpc85xx: Adding more registers and options
This patch exposes more registers which can be used by the DDR drivers or
interactive debugging. U-boot doesn't use all the registers in DDRC.
When advanced tuning is required, writing to those registers is needed.
Add writing to cdr1, cdr2, err_disable, err_int_en and debug registers
Add options to override rcw, address parity to RDIMMs.
Use array for debug registers.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/tqc')
| -rw-r--r-- | board/tqc/tqm85xx/sdram.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c index b2d3185351..39a9e2131a 100644 --- a/board/tqc/tqm85xx/sdram.c +++ b/board/tqc/tqm85xx/sdram.c @@ -240,7 +240,7 @@ static phys_size_t sdram_setup(int casl) * 4. Before DDR_SDRAM_CFG[MEM_EN] set, write D3[21] to disable data * training */ - ddr->debug_3 |= 0x00000400; + ddr->debug[2] |= 0x00000400; /* * 5. Wait 200 micro-seconds @@ -282,18 +282,18 @@ static phys_size_t sdram_setup(int casl) /* * 8. Clear D3[21] to re-enable data training */ - ddr->debug_3 &= ~0x00000400; + ddr->debug[2] &= ~0x00000400; /* * 9. Set D2(21) to force data training to run */ - ddr->debug_2 |= 0x00000400; + ddr->debug[1] |= 0x00000400; /* * 10. Poll on D2[21] until it is cleared by hardware */ asm ("sync;isync;msync"); - while (ddr->debug_2 & 0x00000400) + while (ddr->debug[1] & 0x00000400) asm ("eieio"); /* |
