rename CFG_ macros to CONFIG_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

4 files changed, 36 insertions, 36 deletions

diff --git a/board/siemens/IAD210/IAD210.c b/board/siemens/IAD210/IAD210.c
index 9c0ff02783..e9e7f8472a 100644
--- a/board/siemens/IAD210/IAD210.c
+++ b/board/siemens/IAD210/IAD210.c
@@ -102,7 +102,7 @@ const uint sdram_table[] = {
 
 phys_size_t initdram (int board_type)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 	volatile iop8xx_t *iop = &immap->im_ioport;
 	volatile fec_t *fecp = &immap->im_cpm.cp_fec;
@@ -117,7 +117,7 @@ phys_size_t initdram (int board_type)
 	 * with two SDRAM banks or four cycles every 31.2 us with one
 	 * bank. It will be adjusted after memory sizing.
 	 */
-	memctl->memc_mptpr = CFG_MPTPR;
+	memctl->memc_mptpr = CONFIG_SYS_MPTPR;
 
 	memctl->memc_mar = 0x00000088;
 
@@ -126,10 +126,10 @@ phys_size_t initdram (int board_type)
 	 * preliminary addresses - these have to be modified after the
 	 * SDRAM size has been determined.
 	 */
-	memctl->memc_or2 = CFG_OR2_PRELIM;
-	memctl->memc_br2 = CFG_BR2_PRELIM;
+	memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM;
+	memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM;
 
-	memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE));	/* no refresh yet */
+	memctl->memc_mamr = CONFIG_SYS_MAMR & (~(MAMR_PTAE));	/* no refresh yet */
 
 	udelay (200);
 
@@ -155,20 +155,20 @@ phys_size_t initdram (int board_type)
 	 * Check Bank 0 Memory Size for re-configuration
 	 *
 	 */
-	size = dram_size (CFG_MAMR, (long *) SDRAM_BASE_PRELIM,
+	size = dram_size (CONFIG_SYS_MAMR, (long *) SDRAM_BASE_PRELIM,
 			  SDRAM_MAX_SIZE);
 
 	udelay (1000);
 
 
-	memctl->memc_mamr = CFG_MAMR;
+	memctl->memc_mamr = CONFIG_SYS_MAMR;
 	udelay (1000);
 
 	/*
 	 * Final mapping
 	 */
-	memctl->memc_or2 = ((-size) & 0xFFFF0000) | CFG_OR2_PRELIM;
-	memctl->memc_br2 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V);
+	memctl->memc_or2 = ((-size) & 0xFFFF0000) | CONFIG_SYS_OR2_PRELIM;
+	memctl->memc_br2 = ((CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V);
 
 	udelay (10000);
 
@@ -195,7 +195,7 @@ phys_size_t initdram (int board_type)
 static long int dram_size (long int mamr_value, long int *base,
 			   long int maxsize)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 
 	memctl->memc_mamr = mamr_value;
@@ -219,7 +219,7 @@ void board_serial_init (void)
 
 void board_ether_init (void)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile iop8xx_t *iop = &immap->im_ioport;
 	volatile fec_t *fecp = &immap->im_cpm.cp_fec;
 
@@ -230,7 +230,7 @@ void board_ether_init (void)
 
 int board_early_init_f (void)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 	volatile iop8xx_t *iop = &immap->im_ioport;
@@ -261,7 +261,7 @@ int board_early_init_f (void)
 void board_get_enetaddr (uchar * addr)
 {
 	int i;
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile cpm8xx_t *cpm = &immap->im_cpm;
 	unsigned int rccrtmp;
 
diff --git a/board/siemens/IAD210/atm.c b/board/siemens/IAD210/atm.c
index 1b27f336b2..d1b75bca3e 100644
--- a/board/siemens/IAD210/atm.c
+++ b/board/siemens/IAD210/atm.c
@@ -57,7 +57,7 @@ void   atmUtpInit(void);
  ****************************************************************************/
 int atmLoad()
 {
-  volatile immap_t       *immap  = (immap_t *)CFG_IMMR;
+  volatile immap_t       *immap  = (immap_t *)CONFIG_SYS_IMMR;
   volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;
   volatile iop8xx_t      *iop    = &immap->im_ioport;
 
@@ -91,7 +91,7 @@ int atmLoad()
  ****************************************************************************/
 void atmUnload()
 {
-  volatile immap_t       *immap  = (immap_t *)CFG_IMMR;
+  volatile immap_t       *immap  = (immap_t *)CONFIG_SYS_IMMR;
   volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;
   volatile iop8xx_t      *iop    = &immap->im_ioport;
 
@@ -141,11 +141,11 @@ void atmUnload()
 int atmMemInit()
 {
   int i;
-  unsigned immr = CFG_IMMR;
+  unsigned immr = CONFIG_SYS_IMMR;
   int total_num_rbd = 0;
   int total_num_tbd = 0;
 
-  memset((char *)CFG_IMMR + 0x2000 + ATM_DPRAM_BEGIN, 0x00, ATM_DPRAM_SIZE);
+  memset((char *)CONFIG_SYS_IMMR + 0x2000 + ATM_DPRAM_BEGIN, 0x00, ATM_DPRAM_SIZE);
 
   g_atm.csram_size = NUM_INT_ENTRIES * SIZE_OF_INT_ENTRY;
 
@@ -226,11 +226,11 @@ void atmIntInit()
 void atmApcInit()
 {
   int i;
-  /* unsigned immr = CFG_IMMR; */
-  uint16 * mphypt_ptr = MPHYPT_PTR(CFG_IMMR);
-  struct apc_params_t * apcp_ptr = APCP_PTR(CFG_IMMR);
-  uint16 * apct_prio1_ptr = APCT1_PTR(CFG_IMMR);
-  uint16 * tq_ptr = TQ_PTR(CFG_IMMR);
+  /* unsigned immr = CONFIG_SYS_IMMR; */
+  uint16 * mphypt_ptr = MPHYPT_PTR(CONFIG_SYS_IMMR);
+  struct apc_params_t * apcp_ptr = APCP_PTR(CONFIG_SYS_IMMR);
+  uint16 * apct_prio1_ptr = APCT1_PTR(CONFIG_SYS_IMMR);
+  uint16 * tq_ptr = TQ_PTR(CONFIG_SYS_IMMR);
   /***************************************************/
   /* Initialize MPHY Pointing Table (only one entry) */
   /***************************************************/
@@ -290,7 +290,7 @@ void atmApcInit()
  ****************************************************************************/
 void atmAmtInit()
 {
-  unsigned immr = CFG_IMMR;
+  unsigned immr = CONFIG_SYS_IMMR;
 
   g_atm.am_top = AM_PTR(immr);
   g_atm.ap_top = AP_PTR(immr);
@@ -315,7 +315,7 @@ void atmAmtInit()
  ****************************************************************************/
 void atmCpmInit()
 {
-  unsigned immr = CFG_IMMR;
+  unsigned immr = CONFIG_SYS_IMMR;
 
   memset((char *)immr + 0x3F00, 0x00, 0xC0);
 
@@ -551,7 +551,7 @@ void atmCpmInit()
  ****************************************************************************/
 void atmUtpInit()
 {
-  volatile immap_t       *immap  = (immap_t *)CFG_IMMR;
+  volatile immap_t       *immap  = (immap_t *)CONFIG_SYS_IMMR;
   volatile iop8xx_t      *iop    = &immap->im_ioport;
   volatile car8xx_t	 *car    = &immap->im_clkrst;
   volatile cpm8xx_t	 *cpm    = &immap->im_cpm;
diff --git a/board/siemens/IAD210/atm.h b/board/siemens/IAD210/atm.h
index 71b049725d..cd5b45e869 100644
--- a/board/siemens/IAD210/atm.h
+++ b/board/siemens/IAD210/atm.h
@@ -6,9 +6,9 @@ typedef volatile unsigned short vuint16;
 typedef volatile unsigned int vuint32;
 
 
-#define DPRAM_ATM CFG_IMMR + 0x3000
+#define DPRAM_ATM CONFIG_SYS_IMMR + 0x3000
 
-#define ATM_DPRAM_BEGIN  (DPRAM_ATM - CFG_IMMR - 0x2000)
+#define ATM_DPRAM_BEGIN  (DPRAM_ATM - CONFIG_SYS_IMMR - 0x2000)
 #define NUM_CONNECTIONS  1
 #define SAR_RXB_SIZE     1584
 #define AM_HMASK         0x0FFFFFF0
diff --git a/board/siemens/IAD210/flash.c b/board/siemens/IAD210/flash.c
index 110858d3c3..c262e0f836 100644
--- a/board/siemens/IAD210/flash.c
+++ b/board/siemens/IAD210/flash.c
@@ -24,7 +24,7 @@
 #include <common.h>
 #include <mpc8xx.h>
 
-flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
 
 /*-----------------------------------------------------------------------
  * Functions
@@ -38,13 +38,13 @@ static void flash_get_offsets (ulong base, flash_info_t *info);
 
 unsigned long flash_init (void)
 {
-  volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+  volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
   volatile memctl8xx_t *memctl = &immap->im_memctl;
   unsigned long size;
   int i;
 
   /* Init: no FLASHes known */
-  for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+  for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
     flash_info[i].flash_id = FLASH_UNKNOWN;
   }
 
@@ -59,13 +59,13 @@ unsigned long flash_init (void)
 
 
   /* Remap FLASH according to real size */
-  memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
-  memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
+  memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000);
+  memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
 
   /* Re-do sizing to get full correct info */
-  size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
+  size = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
 
-  flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
+  flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
 
   flash_info[0].size = size;
 
@@ -368,7 +368,7 @@ int	flash_erase (flash_info_t *info, int s_first, int s_last)
   last  = start;
   addr = (vu_long*)(info->start[l_sect]);
   while ((addr[0] & 0x00800080) != 0x00800080) {
-    if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+    if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
       printf ("Timeout\n");
       return 1;
     }
@@ -491,7 +491,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
   /* data polling for D7 */
   start = get_timer (0);
   while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
-    if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+    if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
       return (1);
     }
   }