powerpc: manroland: remove uc100, uc101, mucmc52, hmi1001 support

These boards are still non-generic boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>

17 files changed, 0 insertions, 1615 deletions

diff --git a/board/manroland/hmi1001/Kconfig b/board/manroland/hmi1001/Kconfig
deleted file mode 100644
index 996a87f101..0000000000
--- a/board/manroland/hmi1001/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_HMI1001
-
-config SYS_BOARD
-	default "hmi1001"
-
-config SYS_VENDOR
-	default "manroland"
-
-config SYS_CONFIG_NAME
-	default "hmi1001"
-
-endif
diff --git a/board/manroland/hmi1001/MAINTAINERS b/board/manroland/hmi1001/MAINTAINERS
deleted file mode 100644
index a66a98178c..0000000000
--- a/board/manroland/hmi1001/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-HMI1001 BOARD
-#M:	-
-S:	Maintained
-F:	board/manroland/hmi1001/
-F:	include/configs/hmi1001.h
-F:	configs/hmi1001_defconfig
diff --git a/board/manroland/hmi1001/Makefile b/board/manroland/hmi1001/Makefile
deleted file mode 100644
index c29a665cc3..0000000000
--- a/board/manroland/hmi1001/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= hmi1001.o
diff --git a/board/manroland/hmi1001/hmi1001.c b/board/manroland/hmi1001/hmi1001.c
deleted file mode 100644
index 64bdd8f58f..0000000000
--- a/board/manroland/hmi1001/hmi1001.c
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
- * (C) Copyright 2003-2008
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <malloc.h>
-
-#ifndef CONFIG_SYS_RAMBOOT
-static void sdram_start (int hi_addr)
-{
-	long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
-	/* unlock mode register */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-#if SDRAM_DDR
-	/* set mode register: extended mode */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
-	__asm__ volatile ("sync");
-
-	/* set mode register: reset DLL */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
-	__asm__ volatile ("sync");
-#endif
-
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* auto refresh */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* set mode register */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
-	__asm__ volatile ("sync");
-
-	/* normal operation */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
-	__asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- *	      use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
- *	      is something else than 0x00000000.
- */
-
-phys_size_t initdram (int board_type)
-{
-	ulong dramsize = 0;
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-	uint svr, pvr;
-
-	/* setup SDRAM chip selects */
-	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
-	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-	__asm__ volatile ("sync");
-
-#if SDRAM_DDR
-	/* set tap delay */
-	*(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
-	__asm__ volatile ("sync");
-#endif
-
-	/* find RAM size using SDRAM CS0 only */
-	sdram_start(0);
-	test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
-	sdram_start(1);
-	test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* memory smaller than 1MB is impossible */
-	if (dramsize < (1 << 20)) {
-		dramsize = 0;
-	}
-
-	/* set SDRAM CS0 size according to the amount of RAM found */
-	if (dramsize > 0) {
-		*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
-			__builtin_ffs(dramsize >> 20) - 1;
-	} else {
-		*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
-	}
-
-	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* retrieve size of memory connected to SDRAM CS0 */
-	dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
-	if (dramsize >= 0x13) {
-		dramsize = (1 << (dramsize - 0x13)) << 20;
-	} else {
-		dramsize = 0;
-	}
-
-	/* retrieve size of memory connected to SDRAM CS1 */
-	dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
-	if (dramsize2 >= 0x13) {
-		dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
-	} else {
-		dramsize2 = 0;
-	}
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	/*
-	 * On MPC5200B we need to set the special configuration delay in the
-	 * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM
-	 * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190:
-	 *
-	 * "The SDelay should be written to a value of 0x00000004. It is
-	 * required to account for changes caused by normal wafer processing
-	 * parameters."
-	 */
-	svr = get_svr();
-	pvr = get_pvr();
-	if ((SVR_MJREV(svr) >= 2) &&
-	    (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
-
-		*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
-		__asm__ volatile ("sync");
-	}
-
-/*	return dramsize + dramsize2; */
-	return dramsize;
-}
-
-int checkboard (void)
-{
-	puts ("Board: HMI1001\n");
-	return 0;
-}
-
-#ifdef CONFIG_PREBOOT
-
-static uchar kbd_magic_prefix[]		= "key_magic";
-static uchar kbd_command_prefix[]	= "key_cmd";
-
-#define S1_ROT	0xf0
-#define S2_Q	0x40
-#define S2_M	0x20
-
-struct kbd_data_t {
-	char s1;
-	char s2;
-};
-
-struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
-{
-	kbd_data->s1 = *((volatile uchar*)(CONFIG_SYS_STATUS1_BASE));
-	kbd_data->s2 = *((volatile uchar*)(CONFIG_SYS_STATUS2_BASE));
-
-	return kbd_data;
-}
-
-static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
-{
-	char s1 = str[0];
-	char s2;
-
-	if (s1 >= '0' && s1 <= '9')
-		s1 -= '0';
-	else if (s1 >= 'a' && s1 <= 'f')
-		s1 = s1 - 'a' + 10;
-	else if (s1 >= 'A' && s1 <= 'F')
-		s1 = s1 - 'A' + 10;
-	else
-		return -1;
-
-	if (((S1_ROT & kbd_data->s1) >> 4) != s1)
-		return -1;
-
-	s2 = (S2_Q | S2_M) & kbd_data->s2;
-
-	switch (str[1]) {
-	case 'q':
-	case 'Q':
-		if (s2 == S2_Q)
-			return -1;
-		break;
-	case 'm':
-	case 'M':
-		if (s2 == S2_M)
-			return -1;
-		break;
-	case '\0':
-		if (s2 == (S2_Q | S2_M))
-			return 0;
-	default:
-		return -1;
-	}
-
-	if (str[2])
-		return -1;
-
-	return 0;
-}
-
-static char *key_match (const struct kbd_data_t *kbd_data)
-{
-	char magic[sizeof (kbd_magic_prefix) + 1];
-	char *suffix;
-	char *kbd_magic_keys;
-
-	/*
-	 * The following string defines the characters that can be appended
-	 * to "key_magic" to form the names of environment variables that
-	 * hold "magic" key codes, i. e. such key codes that can cause
-	 * pre-boot actions. If the string is empty (""), then only
-	 * "key_magic" is checked (old behaviour); the string "125" causes
-	 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
-	 */
-	if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
-		kbd_magic_keys = "";
-
-	/* loop over all magic keys;
-	 * use '\0' suffix in case of empty string
-	 */
-	for (suffix = kbd_magic_keys; *suffix ||
-		     suffix == kbd_magic_keys; ++suffix) {
-		sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
-
-		if (compare_magic(kbd_data, getenv(magic)) == 0) {
-			char cmd_name[sizeof (kbd_command_prefix) + 1];
-			char *cmd;
-
-			sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
-			cmd = getenv (cmd_name);
-
-			return (cmd);
-		}
-	}
-
-	return (NULL);
-}
-
-#endif /* CONFIG_PREBOOT */
-
-int misc_init_r (void)
-{
-#ifdef CONFIG_PREBOOT
-	struct kbd_data_t kbd_data;
-	/* Decode keys */
-	char *str = strdup (key_match (get_keys (&kbd_data)));
-	/* Set or delete definition */
-	setenv ("preboot", str);
-	free (str);
-#endif /* CONFIG_PREBOOT */
-
-	return 0;
-}
-
-int board_early_init_r (void)
-{
-	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-	*(vu_long *)MPC5XXX_BOOTCS_START =
-	*(vu_long *)MPC5XXX_CS0_START = START_REG(CONFIG_SYS_FLASH_BASE);
-	*(vu_long *)MPC5XXX_BOOTCS_STOP =
-	*(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE);
-	return 0;
-}
-#ifdef	CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
-	pci_mpc5xxx_init(&hose);
-}
-#endif
diff --git a/board/manroland/mucmc52/Kconfig b/board/manroland/mucmc52/Kconfig
deleted file mode 100644
index a033610cbf..0000000000
--- a/board/manroland/mucmc52/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_MUCMC52
-
-config SYS_BOARD
-	default "mucmc52"
-
-config SYS_VENDOR
-	default "manroland"
-
-config SYS_CONFIG_NAME
-	default "mucmc52"
-
-endif
diff --git a/board/manroland/mucmc52/MAINTAINERS b/board/manroland/mucmc52/MAINTAINERS
deleted file mode 100644
index 45a276408b..0000000000
--- a/board/manroland/mucmc52/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MUCMC52 BOARD
-M:	Heiko Schocher <hs@denx.de>
-S:	Maintained
-F:	board/manroland/mucmc52/
-F:	include/configs/mucmc52.h
-F:	configs/mucmc52_defconfig
diff --git a/board/manroland/mucmc52/Makefile b/board/manroland/mucmc52/Makefile
deleted file mode 100644
index 927fc3250a..0000000000
--- a/board/manroland/mucmc52/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# (C) Copyright 2008
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= mucmc52.o
diff --git a/board/manroland/mucmc52/mucmc52.c b/board/manroland/mucmc52/mucmc52.c
deleted file mode 100644
index c8ed5b73f4..0000000000
--- a/board/manroland/mucmc52/mucmc52.c
+++ /dev/null
@@ -1,394 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * (C) Copyright 2008
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <fdt_support.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-#include <malloc.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-
-#ifndef CONFIG_SYS_RAMBOOT
-static void sdram_start (int hi_addr)
-{
-	long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
-	/* unlock mode register */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CTRL,
-		(SDRAM_CONTROL | 0x80000000 | hi_addr_bit));
-	__asm__ volatile ("sync");
-
-	/* precharge all banks */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CTRL,
-		(SDRAM_CONTROL | 0x80000002 | hi_addr_bit));
-	__asm__ volatile ("sync");
-
-#if SDRAM_DDR
-	/* set mode register: extended mode */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_MODE, (SDRAM_EMODE));
-	__asm__ volatile ("sync");
-
-	/* set mode register: reset DLL */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_MODE,
-		(SDRAM_MODE | 0x04000000));
-	__asm__ volatile ("sync");
-#endif
-
-	/* precharge all banks */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CTRL,
-		(SDRAM_CONTROL | 0x80000002 | hi_addr_bit));
-	__asm__ volatile ("sync");
-
-	/* auto refresh */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CTRL,
-		(SDRAM_CONTROL | 0x80000004 | hi_addr_bit));
-	__asm__ volatile ("sync");
-
-	/* set mode register */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_MODE, (SDRAM_MODE));
-	__asm__ volatile ("sync");
-
-	/* normal operation */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CTRL,
-		(SDRAM_CONTROL | hi_addr_bit));
-	__asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- *	      use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
- *	      is something else than 0x00000000.
- */
-
-phys_size_t initdram (int board_type)
-{
-	ulong dramsize = 0;
-	ulong dramsize2 = 0;
-	uint svr, pvr;
-
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-
-	/* setup SDRAM chip selects */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS0CFG, 0x0000001c); /* 512MB at 0x0 */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS1CFG, 0x80000000);/* disabled */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CONFIG1, SDRAM_CONFIG1);
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CONFIG2, SDRAM_CONFIG2);
-	__asm__ volatile ("sync");
-
-#if SDRAM_DDR
-	/* set tap delay */
-	out_be32 ((unsigned __iomem *)MPC5XXX_CDM_PORCFG, SDRAM_TAPDELAY);
-	__asm__ volatile ("sync");
-#endif
-
-	/* find RAM size using SDRAM CS0 only */
-	sdram_start (0);
-	test1 = get_ram_size ((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
-	sdram_start(1);
-	test2 = get_ram_size ((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
-	if (test1 > test2) {
-		sdram_start (0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* memory smaller than 1MB is impossible */
-	if (dramsize < (1 << 20)) {
-		dramsize = 0;
-	}
-
-	/* set SDRAM CS0 size according to the amount of RAM found */
-	if (dramsize > 0) {
-		out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS0CFG,
-			(0x13 + __builtin_ffs(dramsize >> 20) - 1));
-	} else {
-		out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS0CFG, 0); /* disabled */
-	}
-
-	/* let SDRAM CS1 start right after CS0 */
-	out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS1CFG, (dramsize + 0x0000001c));/*512MB*/
-
-	/* find RAM size using SDRAM CS1 only */
-	if (!dramsize)
-		sdram_start (0);
-	test2 = test1 = get_ram_size ((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x20000000);
-	if (!dramsize) {
-		sdram_start (1);
-		test2 = get_ram_size ((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x20000000);
-	}
-	if (test1 > test2) {
-		sdram_start (0);
-		dramsize2 = test1;
-	} else {
-		dramsize2 = test2;
-	}
-
-	/* memory smaller than 1MB is impossible */
-	if (dramsize2 < (1 << 20)) {
-		dramsize2 = 0;
-	}
-
-	/* set SDRAM CS1 size according to the amount of RAM found */
-	if (dramsize2 > 0) {
-		out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS1CFG,
-			(dramsize | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1)));
-	} else {
-		out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS1CFG, dramsize); /* disabled */
-	}
-
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* retrieve size of memory connected to SDRAM CS0 */
-	dramsize = in_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS0CFG) & 0xFF;
-	if (dramsize >= 0x13) {
-		dramsize = (1 << (dramsize - 0x13)) << 20;
-	} else {
-		dramsize = 0;
-	}
-
-	/* retrieve size of memory connected to SDRAM CS1 */
-	dramsize2 = in_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CS1CFG) & 0xFF;
-	if (dramsize2 >= 0x13) {
-		dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
-	} else {
-		dramsize2 = 0;
-	}
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	 /*
-	 * On MPC5200B we need to set the special configuration delay in the
-	 * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM
-	 * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190:
-	 *
-	 * "The SDelay should be written to a value of 0x00000004. It is
-	 * required to account for changes caused by normal wafer processing
-	 * parameters."
-	 */
-	svr = get_svr();
-	pvr = get_pvr();
-	if ((SVR_MJREV(svr) >= 2) &&
-	    (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
-
-		out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_SDELAY, 0x04);
-		__asm__ volatile ("sync");
-	}
-
-	return dramsize + dramsize2;
-}
-
-int checkboard (void)
-{
-	puts ("Board: MUC.MC-52 HW WDT ");
-#if defined(CONFIG_HW_WATCHDOG)
-	puts ("enabled\n");
-#else
-	puts ("disabled\n");
-#endif
-	return 0;
-}
-
-#ifdef CONFIG_PREBOOT
-
-static uchar kbd_magic_prefix[]		= "key_magic";
-static uchar kbd_command_prefix[]	= "key_cmd";
-
-#define S1_ROT	0xf0
-#define S2_Q	0x40
-#define S2_M	0x20
-
-struct kbd_data_t {
-	char s1;
-	char s2;
-};
-
-struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
-{
-	kbd_data->s1 = in_8 ((volatile uchar*)CONFIG_SYS_STATUS1_BASE);
-	kbd_data->s2 = in_8 ((volatile uchar*)CONFIG_SYS_STATUS2_BASE);
-
-	return kbd_data;
-}
-
-static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
-{
-	char s1 = str[0];
-	char s2;
-
-	if (s1 >= '0' && s1 <= '9')
-		s1 -= '0';
-	else if (s1 >= 'a' && s1 <= 'f')
-		s1 = s1 - 'a' + 10;
-	else if (s1 >= 'A' && s1 <= 'F')
-		s1 = s1 - 'A' + 10;
-	else
-		return -1;
-
-	if (((S1_ROT & kbd_data->s1) >> 4) != s1)
-		return -1;
-
-	s2 = (S2_Q | S2_M) & kbd_data->s2;
-
-	switch (str[1]) {
-	case 'q':
-	case 'Q':
-		if (s2 == S2_Q)
-			return -1;
-		break;
-	case 'm':
-	case 'M':
-		if (s2 == S2_M)
-			return -1;
-		break;
-	case '\0':
-		if (s2 == (S2_Q | S2_M))
-			return 0;
-	default:
-		return -1;
-	}
-
-	if (str[2])
-		return -1;
-
-	return 0;
-}
-
-static char *key_match (const struct kbd_data_t *kbd_data)
-{
-	char magic[sizeof (kbd_magic_prefix) + 1];
-	char *suffix;
-	char *kbd_magic_keys;
-
-	/*
-	 * The following string defines the characters that can be appended
-	 * to "key_magic" to form the names of environment variables that
-	 * hold "magic" key codes, i. e. such key codes that can cause
-	 * pre-boot actions. If the string is empty (""), then only
-	 * "key_magic" is checked (old behaviour); the string "125" causes
-	 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
-	 */
-	if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
-		kbd_magic_keys = "";
-
-	/* loop over all magic keys;
-	 * use '\0' suffix in case of empty string
-	 */
-	for (suffix = kbd_magic_keys; *suffix ||
-		     suffix == kbd_magic_keys; ++suffix) {
-		sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
-
-		if (compare_magic(kbd_data, getenv(magic)) == 0) {
-			char cmd_name[sizeof (kbd_command_prefix) + 1];
-			char *cmd;
-
-			sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
-			cmd = getenv (cmd_name);
-
-			return (cmd);
-		}
-	}
-
-	return (NULL);
-}
-
-#endif /* CONFIG_PREBOOT */
-
-int misc_init_r (void)
-{
-#ifdef CONFIG_PREBOOT
-	struct kbd_data_t kbd_data;
-	/* Decode keys */
-	char *str = strdup (key_match (get_keys (&kbd_data)));
-	/* Set or delete definition */
-	setenv ("preboot", str);
-	free (str);
-#endif /* CONFIG_PREBOOT */
-
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x38), ' ');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x39), ' ');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3A), ' ');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3B), ' ');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3C), ' ');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3D), ' ');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3E), ' ');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3F), ' ');
-
-	return 0;
-}
-
-int board_early_init_r (void)
-{
-	out_be32 ((unsigned __iomem *)MPC5XXX_BOOTCS_CFG, in_be32 ((unsigned __iomem *)MPC5XXX_BOOTCS_CFG) & ~0x1);
-	out_be32 ((unsigned __iomem *)MPC5XXX_BOOTCS_START, START_REG(CONFIG_SYS_FLASH_BASE));
-	out_be32 ((unsigned __iomem *)MPC5XXX_CS0_START, START_REG(CONFIG_SYS_FLASH_BASE));
-	out_be32 ((unsigned __iomem *)MPC5XXX_BOOTCS_STOP,
-		STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE));
-	out_be32 ((unsigned __iomem *)MPC5XXX_CS0_STOP,
-		STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE));
-	return 0;
-}
-
-int last_stage_init (void)
-{
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x38), 'M');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x39), 'U');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3A), 'C');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3B), '.');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3C), 'M');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3D), 'C');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3E), '5');
-	out_8 ((volatile uchar *)(CONFIG_SYS_DISPLAY_BASE + 0x3F), '2');
-
-	return 0;
-}
-
-#if defined(CONFIG_HW_WATCHDOG)
-#define GPT_OUT_0	0x00000027
-#define GPT_OUT_1	0x00000037
-void hw_watchdog_reset (void)
-{
-	/* Trigger HW Watchdog with TIMER_0 */
-	out_be32 ((unsigned __iomem *)MPC5XXX_GPT0_ENABLE, GPT_OUT_1);
-	out_be32 ((unsigned __iomem *)MPC5XXX_GPT0_ENABLE, GPT_OUT_0);
-}
-#endif
-
-#ifdef	CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init (struct pci_controller *);
-
-void pci_init_board (void)
-{
-	pci_mpc5xxx_init (&hose);
-}
-#endif
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-
-	return 0;
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/manroland/uc100/Kconfig b/board/manroland/uc100/Kconfig
deleted file mode 100644
index 08f681b0a9..0000000000
--- a/board/manroland/uc100/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_UC100
-
-config SYS_BOARD
-	default "uc100"
-
-config SYS_VENDOR
-	default "manroland"
-
-config SYS_CONFIG_NAME
-	default "uc100"
-
-endif
diff --git a/board/manroland/uc100/MAINTAINERS b/board/manroland/uc100/MAINTAINERS
deleted file mode 100644
index 260471ce92..0000000000
--- a/board/manroland/uc100/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-UC100 BOARD
-M:	Stefan Roese <sr@denx.de>
-S:	Maintained
-F:	board/manroland/uc100/
-F:	include/configs/uc100.h
-F:	configs/uc100_defconfig
diff --git a/board/manroland/uc100/Makefile b/board/manroland/uc100/Makefile
deleted file mode 100644
index 8e69c52de1..0000000000
--- a/board/manroland/uc100/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= uc100.o pcmcia.o
diff --git a/board/manroland/uc100/pcmcia.c b/board/manroland/uc100/pcmcia.c
deleted file mode 100644
index db3821a5e4..0000000000
--- a/board/manroland/uc100/pcmcia.c
+++ /dev/null
@@ -1,192 +0,0 @@
-#include <common.h>
-#include <mpc8xx.h>
-#include <pcmcia.h>
-
-#undef	CONFIG_PCMCIA
-
-#if defined(CONFIG_CMD_PCMCIA)
-#define	CONFIG_PCMCIA
-#endif
-
-#if (defined(CONFIG_CMD_IDE)) && defined(CONFIG_IDE_8xx_PCCARD)
-#define	CONFIG_PCMCIA
-#endif
-
-#ifdef	CONFIG_PCMCIA
-
-#define PCMCIA_BOARD_MSG "UC100"
-
-/*
- * Remark: don't turn off OE "__MY_PCMCIA_GCRX_CXOE" on UC100 board.
- *         This leads to board-hangup! (sr, 8 Dez. 2004)
- */
-static void cfg_ports (void)
-{
-	volatile immap_t	*immap;
-
-	immap = (immap_t *)CONFIG_SYS_IMMR;
-
-	/*
-	 * Configure Port A for MAX1602 PC-Card Power-Interface Switch
-	 */
-	immap->im_ioport.iop_padat &= ~0x8000;	/* set port x output to low */
-	immap->im_ioport.iop_padir |= 0x8000;	/* enable port x as output */
-
-	debug ("Set Port A: PAR: %08x DIR: %08x DAT: %08x\n",
-	       immap->im_ioport.iop_papar, immap->im_ioport.iop_padir,
-	       immap->im_ioport.iop_padat);
-}
-
-int pcmcia_hardware_enable(int slot)
-{
-	volatile immap_t	*immap;
-	volatile pcmconf8xx_t	*pcmp;
-	volatile sysconf8xx_t	*sysp;
-	uint reg, mask;
-
-	debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
-	udelay(10000);
-
-	immap = (immap_t *)CONFIG_SYS_IMMR;
-	sysp  = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf));
-	pcmp  = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
-
-	/* Configure Ports for TPS2211A PC-Card Power-Interface Switch */
-	cfg_ports ();
-
-	/*
-	 * Configure SIUMCR to enable PCMCIA port B
-	 * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
-	 */
-	sysp->sc_siumcr &= ~SIUMCR_DBGC11;	/* set DBGC to 00 */
-
-	/* clear interrupt state, and disable interrupts */
-	pcmp->pcmc_pscr =  PCMCIA_MASK(_slot_);
-	pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
-
-	/*
-	 * Disable interrupts, DMA, and PCMCIA buffers
-	 * (isolate the interface) and assert RESET signal
-	 */
-	debug ("Disable PCMCIA buffers and assert RESET\n");
-	reg  = 0;
-	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	PCMCIA_PGCRX(_slot_) = reg;
-	udelay(500);
-
-	/*
-	 * Make sure there is a card in the slot, then configure the interface.
-	 */
-	udelay(10000);
-	debug ("[%d] %s: PIPR(%p)=0x%x\n",
-	       __LINE__,__FUNCTION__,
-	       &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
-	if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
-		printf ("   No Card found\n");
-		return (1);
-	}
-
-	/*
-	 * Power On.
-	 */
-	mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
-	reg  = pcmp->pcmc_pipr;
-	debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
-	       reg,
-	       (reg&PCMCIA_VS1(slot))?"n":"ff",
-	       (reg&PCMCIA_VS2(slot))?"n":"ff");
-
-	if ((reg & mask) == mask)
-		puts (" 5.0V card found: ");
-	else
-		puts (" 3.3V card found: ");
-
-	/*  switch VCC on */
-	immap->im_ioport.iop_padat |= 0x8000; /* power enable 3.3V */
-
-	udelay(10000);
-
-	debug ("Enable PCMCIA buffers and stop RESET\n");
-	reg  =  PCMCIA_PGCRX(_slot_);
-	reg &= ~__MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	reg &= ~__MY_PCMCIA_GCRX_CXOE;		/* active low  */
-	PCMCIA_PGCRX(_slot_) = reg;
-
-	udelay(250000);	/* some cards need >150 ms to come up :-( */
-
-	debug ("# hardware_enable done\n");
-
-	return (0);
-}
-
-
-#if defined(CONFIG_CMD_PCMCIA)
-int pcmcia_hardware_disable(int slot)
-{
-	volatile immap_t	*immap;
-	volatile cpm8xx_t	*cp;
-	volatile pcmconf8xx_t	*pcmp;
-	u_long reg;
-
-	debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
-	immap = (immap_t *)CONFIG_SYS_IMMR;
-	pcmp  = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
-
-	/* switch VCC off */
-	immap->im_ioport.iop_padat &= ~0x8000; /* power disable 3.3V */
-
-	/* Configure PCMCIA General Control Register */
-	debug ("Disable PCMCIA buffers and assert RESET\n");
-	reg  = 0;
-	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	PCMCIA_PGCRX(_slot_) = reg;
-
-	udelay(10000);
-
-	return (0);
-}
-#endif
-
-
-int pcmcia_voltage_set(int slot, int vcc, int vpp)
-{
-	u_long reg;
-
-	debug ("voltage_set: "
-			PCMCIA_BOARD_MSG
-			" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
-	'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
-	/*
-	 * Disable PCMCIA buffers (isolate the interface)
-	 * and assert RESET signal
-	 */
-	debug ("Disable PCMCIA buffers and assert RESET\n");
-	reg  = PCMCIA_PGCRX(_slot_);
-	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	PCMCIA_PGCRX(_slot_) = reg;
-	udelay(500);
-
-	/*
-	 * Configure Port C pins for
-	 * 5 Volts Enable and 3 Volts enable,
-	 * Turn all power pins to Hi-Z
-	 */
-	debug ("PCMCIA power OFF\n");
-	cfg_ports ();	/* Enables switch, but all in Hi-Z */
-
-	debug ("Enable PCMCIA buffers and stop RESET\n");
-	reg  =  PCMCIA_PGCRX(_slot_);
-	reg &= ~__MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	reg &= ~__MY_PCMCIA_GCRX_CXOE;		/* active low  */
-	PCMCIA_PGCRX(_slot_) = reg;
-	udelay(500);
-
-	debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
-	       slot+'A');
-	return (0);
-}
-
-#endif	/* CONFIG_PCMCIA */
diff --git a/board/manroland/uc100/uc100.c b/board/manroland/uc100/uc100.c
deleted file mode 100644
index 31f08dda7b..0000000000
--- a/board/manroland/uc100/uc100.c
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#if 0
-#define DEBUG
-#endif
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <i2c.h>
-#include <miiphy.h>
-
-int fec8xx_miiphy_write(char *devname, unsigned char  addr,
-		unsigned char  reg, unsigned short value);
-
-/*********************************************************************/
-/* UPMA Pre Initilization Table by WV (Miron MT48LC16M16A2-7E B)     */
-/*********************************************************************/
-const uint sdram_init_upm_table[] = {
-	/* SDRAM Initialisation Sequence (offset 0 in UPMA RAM) WV */
-	/* NOP    - Precharge - AutoRefr  - NOP       - NOP        */
-	/* NOP    - AutoRefr  - NOP                                */
-	/* NOP    - NOP       - LoadModeR - NOP       - Active     */
-	/* Position of Single Read                                 */
-	0x0ffffc04, 0x0ff77c04, 0x0ff5fc04, 0x0ffffc04, 0x0ffffc04,
-	0x0ffffc04, 0x0ff5fc04, 0x0ffffc04,
-
-	/* Burst Read. (offset 8 in UPMA RAM)     */
-	/* Cycle lent for Initialisation WV */
-	0x0ffffc04, 0x0ffffc34, 0x0f057c34, 0x0ffffc30, 0x1ff7fc05,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Single Write. (offset 18 in UPMA RAM) */
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Burst Write. (offset 20 in UPMA RAM) */
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Refresh  (offset 30 in UPMA RAM) */
-	0x0FF77C04, 0x0FFFFC04, 0x0FF5FC84, 0x0FFFFC04, 0x0FFFFC04,
-	0x0FFFFC84, 0x1FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Exception. (offset 3c in UPMA RAM) */
-	0x7FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-};
-
-/*********************************************************************/
-/* UPMA initilization table.                                         */
-/*********************************************************************/
-const uint sdram_upm_table[] = {
-	/* single read. (offset 0 in UPMA RAM) */
-	0x0F07FC04, 0x0FFFFC04, 0x00BDFC04, 0x0FF77C00, 0x1FFFFC05,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,     /* 0x05-0x07 new WV */
-
-	/* Burst Read. (offset 8 in UPMA RAM) */
-	0x0F07FC04, 0x0FFFFC04, 0x00BDFC04, 0x00FFFC00, 0x00FFFC00,
-	0x00FFFC00, 0x0FF77C00, 0x1FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Single Write. (offset 18 in UPMA RAM) */
-	0x0F07FC04, 0x0FFFFC00, 0x00BD7C04, 0x0FFFFC04, 0x0FF77C04,
-	0x1FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Burst Write. (offset 20 in UPMA RAM) */
-	0x0F07FC04, 0x0FFFFC00, 0x00BD7C00, 0x00FFFC00, 0x00FFFC00,
-	0x00FFFC04, 0x0FFFFC04, 0x0FF77C04, 0x1FFFFC05, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Refresh  (offset 30 in UPMA RAM) */
-	0x0FF77C04, 0x0FFFFC04, 0x0FF5FC84, 0x0FFFFC04, 0x0FFFFC04,
-	0x0FFFFC84, 0x1FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Exception. (offset 3c in UPMA RAM) */
-	0x7FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, /* 0x3C new WV */
-};
-
-/*********************************************************************/
-/* UPMB initilization table.                                         */
-/*********************************************************************/
-const uint mpm_upm_table[] = {
-	/*  single read. (offset 0 in upm RAM) */
-	0x8FF00004, 0x0FF00004, 0x0FF81004, 0x1FF00001,
-	0x1FF00001, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* burst read. (Offset 8 in upm RAM)   */
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* single write. (Offset 0x18 in upm RAM) */
-	0x8FF00004, 0x0FF00004, 0x0FF81004, 0x0FF00004,
-	0x0FF00004, 0x1FF00001, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/*  burst write. (Offset 0x20 in upm RAM) */
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Refresh cycle, offset 0x30 */
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-	/* Exception, 0ffset 0x3C */
-	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-};
-
-
-int board_switch(void)
-{
-	volatile pcmconf8xx_t	*pcmp;
-
-	pcmp  = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
-
-	return ((pcmp->pcmc_pipr >> 24) & 0xf);
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
-	char str[64];
-	int i = getenv_f("serial#", str, sizeof(str));
-
-	puts ("Board: ");
-
-	if (i == -1) {
-		puts ("### No HW ID - assuming UC100");
-	} else {
-		puts(str);
-	}
-
-	printf (" (SWITCH=%1X)\n", board_switch());
-
-	return 0;
-}
-
-
-/*
- * Initialize SDRAM
- */
-phys_size_t initdram (int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-
-	/*---------------------------------------------------------------------*/
-	/* Initialize the UPMA/UPMB registers with the appropriate table.      */
-	/*---------------------------------------------------------------------*/
-	upmconfig (UPMA, (uint *) sdram_init_upm_table,
-		   sizeof (sdram_init_upm_table) / sizeof (uint));
-	upmconfig (UPMB, (uint *) mpm_upm_table,
-		   sizeof (mpm_upm_table) / sizeof (uint));
-
-	/*---------------------------------------------------------------------*/
-	/* Memory Periodic Timer Prescaler: divide by 16                       */
-	/*---------------------------------------------------------------------*/
-	memctl->memc_mptpr = 0x0200; /* Divide by 32 WV */
-
-	memctl->memc_mamr = CONFIG_SYS_MAMR_VAL & 0xFF7FFFFF; /* Bit 8 := "0" Kein Refresh WV */
-	memctl->memc_mbmr = CONFIG_SYS_MBMR_VAL;
-
-	/*---------------------------------------------------------------------*/
-	/* Initialize the Memory Controller registers, MPTPR, Chip Select 1    */
-	/* for SDRAM                                                           */
-	/*                                                                     */
-	/* NOTE: The refresh rate in MAMR reg is set according to the lowest   */
-	/*       clock rate (16.67MHz) to allow proper operation for all ADS   */
-	/*       clock frequencies.                                            */
-	/*---------------------------------------------------------------------*/
-	memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
-	memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
-
-	/*-------------------------------------------------------------------*/
-	/* Wait at least 200 usec for DRAM to stabilize, this magic number   */
-	/* obtained from the init code.                                      */
-	/*-------------------------------------------------------------------*/
-	udelay(200);
-
-	memctl->memc_mamr = (memctl->memc_mamr | 0x04) & ~0x08;
-
-	memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
-	memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
-
-	/*---------------------------------------------------------------------*/
-	/* run MRS command in location 5-8 of UPMB.                            */
-	/*---------------------------------------------------------------------*/
-	memctl->memc_mar = 0x88;
-	/* RUN UPMA on CS1 1-time from UPMA addr 0x05 */
-
-	memctl->memc_mcr = 0x80002100;
-	/* RUN UPMA on CS1 1-time from UPMA addr 0x00 WV */
-
-	udelay(200);
-
-	/*---------------------------------------------------------------------*/
-	/* Initialisation for normal access WV                                 */
-	/*---------------------------------------------------------------------*/
-
-	/*---------------------------------------------------------------------*/
-	/* Initialize the UPMA register with the appropriate table.            */
-	/*---------------------------------------------------------------------*/
-	upmconfig (UPMA, (uint *) sdram_upm_table,
-		   sizeof (sdram_upm_table) / sizeof (uint));
-
-	/*---------------------------------------------------------------------*/
-	/* rerstore MBMR value (4-beat refresh burst.)                         */
-	/*---------------------------------------------------------------------*/
-	memctl->memc_mamr = CONFIG_SYS_MAMR_VAL | 0x00800000; /* Bit 8 := "1" Refresh Enable WV */
-
-	udelay(200);
-
-	return (64 * 1024 * 1024); /* fixed setup for 64MBytes! */
-}
-
-
-int misc_init_r (void)
-{
-	uchar val;
-
-	/*
-	 * Make sure that RTC has clock output enabled (triggers watchdog!)
-	 */
-	val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, 0x0D);
-	val |= 0x80;
-	i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, 0x0D, val);
-
-	/*
-	 * Configure PHY to setup LED's correctly and use 100MBit, FD
-	 */
-	mii_init();
-
-	/* disable auto-negotiation, 100mbit, full-duplex */
-	fec8xx_miiphy_write(NULL, 0, MII_BMCR, 0x2100);
-
-	/* set LED's to Link, Transmit, Receive           */
-	fec8xx_miiphy_write(NULL,  0, MII_NWAYTEST, 0x4122);
-
-	return 0;
-}
diff --git a/board/manroland/uc101/Kconfig b/board/manroland/uc101/Kconfig
deleted file mode 100644
index c285b22f1b..0000000000
--- a/board/manroland/uc101/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_UC101
-
-config SYS_BOARD
-	default "uc101"
-
-config SYS_VENDOR
-	default "manroland"
-
-config SYS_CONFIG_NAME
-	default "uc101"
-
-endif
diff --git a/board/manroland/uc101/MAINTAINERS b/board/manroland/uc101/MAINTAINERS
deleted file mode 100644
index 0fc7b85838..0000000000
--- a/board/manroland/uc101/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-UC101 BOARD
-M:	Heiko Schocher <hs@denx.de>
-S:	Maintained
-F:	board/manroland/uc101/
-F:	include/configs/uc101.h
-F:	configs/uc101_defconfig
diff --git a/board/manroland/uc101/Makefile b/board/manroland/uc101/Makefile
deleted file mode 100644
index 9289d915d9..0000000000
--- a/board/manroland/uc101/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= uc101.o
diff --git a/board/manroland/uc101/uc101.c b/board/manroland/uc101/uc101.c
deleted file mode 100644
index e794c4645e..0000000000
--- a/board/manroland/uc101/uc101.c
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- * (C) Copyright 2006
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <fdt_support.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-#include <malloc.h>
-
-/* some SIMPLE GPIO Pins */
-#define GPIO_USB_8	(31-12)
-#define GPIO_USB_7	(31-13)
-#define GPIO_USB_6	(31-14)
-#define GPIO_USB_0	(31-15)
-#define GPIO_PSC3_7	(31-18)
-#define GPIO_PSC3_6	(31-19)
-#define GPIO_PSC3_1	(31-22)
-#define GPIO_PSC3_0	(31-23)
-
-/* some simple Interrupt GPIO Pins */
-#define GPIO_PSC3_8	2
-#define GPIO_USB1_9	3
-
-#define GPT_OUT_0	0x00000027
-#define GPT_OUT_1	0x00000037
-#define	GPT_DISABLE	0x00000000	/* GPT pin disabled */
-
-#define GP_SIMP_ENABLE_O(n, v) {pgpio->simple_dvo |= (v << n); \
-				pgpio->simple_ddr |= (1 << n); \
-				pgpio->simple_gpioe |= (1 << n); \
-				}
-
-#define GP_SIMP_ENABLE_I(n) {	pgpio->simple_ddr |= ~(1 << n); \
-				pgpio->simple_gpioe |= (1 << n); \
-				}
-
-#define GP_SIMP_SET_O(n, v)  (pgpio->simple_dvo = v ? \
-				(pgpio->simple_dvo | (1 << n)) : \
-				(pgpio->simple_dvo & ~(1 << n)) )
-
-#define GP_SIMP_GET_O(n)  ((pgpio->simple_dvo >> n) & 1)
-#define GP_SIMP_GET_I(n)  ((pgpio->simple_ival >> n) & 1)
-
-#define GP_SINT_SET_O(n, v)  (pgpio->sint_dvo = v ? \
-				(pgpio->sint_dvo | (1 << n)) : \
-				(pgpio->sint_dvo & ~(1 << n)) )
-
-#define GP_SINT_ENABLE_O(n, v) {pgpio->sint_ode &= ~(1 << n); \
-				pgpio->sint_ddr |= (1 << n); \
-				GP_SINT_SET_O(n, v); \
-				pgpio->sint_gpioe |= (1 << n); \
-				}
-
-#define GP_SINT_ENABLE_I(n) {	pgpio->sint_ddr |= ~(1 << n); \
-				pgpio->sint_gpioe |= (1 << n); \
-				}
-
-#define GP_SINT_GET_O(n)  ((pgpio->sint_ival >> n) & 1)
-#define GP_SINT_GET_I(n)  ((pgpio-ntt_ival >> n) & 1)
-
-#define GP_TIMER_ENABLE_O(n, v) ( \
-	((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->emsr = v ? \
-				GPT_OUT_1 : \
-				GPT_OUT_0 )
-
-#define GP_TIMER_SET_O(n, v)	GP_TIMER_ENABLE_O(n, v)
-
-#define GP_TIMER_GET_O(n, v) ( \
-	(((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->emsr & 0x10) >> 4)
-
-#define GP_TIMER_GET_I(n, v) ( \
-	(((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->sr & 0x100) >> 8)
-
-#ifndef CONFIG_SYS_RAMBOOT
-static void sdram_start (int hi_addr)
-{
-	long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
-	/* unlock mode register */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-#if SDRAM_DDR
-	/* set mode register: extended mode */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
-	__asm__ volatile ("sync");
-
-	/* set mode register: reset DLL */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
-	__asm__ volatile ("sync");
-#endif
-
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* auto refresh */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* set mode register */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
-	__asm__ volatile ("sync");
-
-	/* normal operation */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
-	__asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- *	      use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
- *	      is something else than 0x00000000.
- */
-
-phys_size_t initdram (int board_type)
-{
-	ulong dramsize = 0;
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-
-	/* setup SDRAM chip selects */
-	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
-	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-	__asm__ volatile ("sync");
-
-#if SDRAM_DDR
-	/* set tap delay */
-	*(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
-	__asm__ volatile ("sync");
-#endif
-
-	/* find RAM size using SDRAM CS0 only */
-	sdram_start(0);
-	test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
-	sdram_start(1);
-	test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* memory smaller than 1MB is impossible */
-	if (dramsize < (1 << 20)) {
-		dramsize = 0;
-	}
-
-	/* set SDRAM CS0 size according to the amount of RAM found */
-	if (dramsize > 0) {
-		*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
-			__builtin_ffs(dramsize >> 20) - 1;
-	} else {
-		*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
-	}
-
-	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* retrieve size of memory connected to SDRAM CS0 */
-	dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
-	if (dramsize >= 0x13) {
-		dramsize = (1 << (dramsize - 0x13)) << 20;
-	} else {
-		dramsize = 0;
-	}
-
-	/* retrieve size of memory connected to SDRAM CS1 */
-	dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
-	if (dramsize2 >= 0x13) {
-		dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
-	} else {
-		dramsize2 = 0;
-	}
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-/*	return dramsize + dramsize2; */
-	return dramsize;
-}
-
-int checkboard (void)
-{
-	puts ("Board: MAN UC101\n");
-	/* clear the Display */
-	*(char *)(CONFIG_SYS_DISP_CWORD) = 0x80;
-	return 0;
-}
-
-static void init_ports (void)
-{
-	volatile struct mpc5xxx_gpio *pgpio =
-		(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
-
-	GP_SIMP_ENABLE_I(GPIO_USB_8);	/* HEX Bit 3 */
-	GP_SIMP_ENABLE_I(GPIO_USB_7);	/* HEX Bit 2 */
-	GP_SIMP_ENABLE_I(GPIO_USB_6);	/* HEX Bit 1 */
-	GP_SIMP_ENABLE_I(GPIO_USB_0);	/* HEX Bit 0 */
-	GP_SIMP_ENABLE_I(GPIO_PSC3_0);	/* Switch Menue A */
-	GP_SIMP_ENABLE_I(GPIO_PSC3_1);	/* Switch Menue B */
-	GP_SIMP_ENABLE_I(GPIO_PSC3_6);	/* Switch Cold_Warm */
-	GP_SIMP_ENABLE_I(GPIO_PSC3_7);	/* Switch Restart */
-	GP_SINT_ENABLE_O(GPIO_PSC3_8, 0);	/* LED H2 */
-	GP_SINT_ENABLE_O(GPIO_USB1_9, 0);	/* LED H3 */
-	GP_TIMER_ENABLE_O(4, 0);	/* LED H4 */
-	GP_TIMER_ENABLE_O(5, 0);	/* LED H5 */
-	GP_TIMER_ENABLE_O(3, 0);	/* LED HB */
-	GP_TIMER_ENABLE_O(1, 0);	/* RES_COLDSTART */
-}
-
-#ifdef CONFIG_PREBOOT
-
-static uchar kbd_magic_prefix[]		= "key_magic";
-static uchar kbd_command_prefix[]	= "key_cmd";
-
-struct kbd_data_t {
-	char s1;
-};
-
-struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
-{
-	volatile struct mpc5xxx_gpio *pgpio =
-		(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
-
-	kbd_data->s1 = GP_SIMP_GET_I(GPIO_USB_8) << 3 | \
-			GP_SIMP_GET_I(GPIO_USB_7) << 2 | \
-			GP_SIMP_GET_I(GPIO_USB_6) << 1 | \
-			GP_SIMP_GET_I(GPIO_USB_0) << 0;
-	return kbd_data;
-}
-
-static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
-{
-	char s1 = str[0];
-
-	if (s1 >= '0' && s1 <= '9')
-		s1 -= '0';
-	else if (s1 >= 'a' && s1 <= 'f')
-		s1 = s1 - 'a' + 10;
-	else if (s1 >= 'A' && s1 <= 'F')
-		s1 = s1 - 'A' + 10;
-	else
-		return -1;
-
-	if (s1 != kbd_data->s1) return -1;
-	return 0;
-}
-
-static char *key_match (const struct kbd_data_t *kbd_data)
-{
-	char magic[sizeof (kbd_magic_prefix) + 1];
-	char *suffix;
-	char *kbd_magic_keys;
-
-	/*
-	 * The following string defines the characters that can be appended
-	 * to "key_magic" to form the names of environment variables that
-	 * hold "magic" key codes, i. e. such key codes that can cause
-	 * pre-boot actions. If the string is empty (""), then only
-	 * "key_magic" is checked (old behaviour); the string "125" causes
-	 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
-	 */
-	if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
-		kbd_magic_keys = "";
-
-	/* loop over all magic keys;
-	 * use '\0' suffix in case of empty string
-	 */
-	for (suffix = kbd_magic_keys; *suffix ||
-		     suffix == kbd_magic_keys; ++suffix) {
-		sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
-
-		if (compare_magic(kbd_data, getenv(magic)) == 0) {
-			char cmd_name[sizeof (kbd_command_prefix) + 1];
-			char *cmd;
-
-			sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
-			cmd = getenv (cmd_name);
-
-			return (cmd);
-		}
-	}
-
-	return (NULL);
-}
-
-#endif /* CONFIG_PREBOOT */
-
-int misc_init_r (void)
-{
-	/* Init the I/O ports */
-	init_ports ();
-
-#ifdef CONFIG_PREBOOT
-	struct kbd_data_t kbd_data;
-	/* Decode keys */
-	char *str = strdup (key_match (get_keys (&kbd_data)));
-	/* Set or delete definition */
-	setenv ("preboot", str);
-	free (str);
-#endif /* CONFIG_PREBOOT */
-	return 0;
-}
-
-int board_early_init_r (void)
-{
-	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-	*(vu_long *)MPC5XXX_BOOTCS_START =
-	*(vu_long *)MPC5XXX_CS0_START = START_REG(CONFIG_SYS_FLASH_BASE);
-	*(vu_long *)MPC5XXX_BOOTCS_STOP =
-	*(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE);
-	/* Interbus enable it here ?? */
-	*(vu_long *)MPC5XXX_GPT6_ENABLE = GPT_OUT_1;
-	return 0;
-}
-#ifdef	CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
-	pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined(CONFIG_HW_WATCHDOG)
-void hw_watchdog_reset(void)
-{
-	/* Trigger HW Watchdog with TIMER_0 */
-	*(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_1;
-	*(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_0;
-}
-#endif
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-
-	return 0;
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */