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| author | tang yuantian <Yuantian.Tang@freescale.com> | 2014-12-17 15:42:54 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-01-16 09:31:06 -0800 |
| commit | f49b8c1b5d9db6d349000b25312c672a1f6627b8 (patch) | |
| tree | ff9c7ec4bf97adea1f0e8ecb670e6d64bd9ce484 /board/freescale/t102xrdb/ddr.c | |
| parent | 026f64f636e93f4d8298ab9a3ac3815ccbdb38c0 (diff) | |
| download | blackbird-obmc-uboot-f49b8c1b5d9db6d349000b25312c672a1f6627b8.tar.gz blackbird-obmc-uboot-f49b8c1b5d9db6d349000b25312c672a1f6627b8.zip | |
mpc85xx/t102xrdb: convert deep sleep to generic board interface
A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Besides, added SPI/SD/NAND boot deep sleep support.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/t102xrdb/ddr.c')
| -rw-r--r-- | board/freescale/t102xrdb/ddr.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c index a20330b1d0..a2a8f4ccf0 100644 --- a/board/freescale/t102xrdb/ddr.c +++ b/board/freescale/t102xrdb/ddr.c @@ -11,6 +11,7 @@ #include <fsl_ddr_sdram.h> #include <fsl_ddr_dimm_params.h> #include <asm/fsl_law.h> +#include <asm/mpc85xx_gpio.h> DECLARE_GLOBAL_DATA_PTR; @@ -136,6 +137,19 @@ found: #endif } +#if defined(CONFIG_DEEP_SLEEP) +void board_mem_sleep_setup(void) +{ + void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE; + + /* does not provide HW signals for power management */ + clrbits_8(cpld_base + 0x17, 0x40); + /* Disable MCKE isolation */ + gpio_set_value(2, 0); + udelay(1); +} +#endif + phys_size_t initdram(int board_type) { phys_size_t dram_size; @@ -150,5 +164,10 @@ phys_size_t initdram(int board_type) /* DDR has been initialised by first stage boot loader */ dram_size = fsl_ddr_sdram_size(); #endif + +#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD) + fsl_dp_resume(); +#endif + return dram_size; } |
