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authortang yuantian <Yuantian.Tang@freescale.com>2014-12-18 09:55:07 +0800
committerYork Sun <yorksun@freescale.com>2015-01-16 09:31:26 -0800
commit2c537642e98969e1810c6fdeff3099584f674a66 (patch)
treea53ff683a6ac9be6323ba432575909eebff13647 /board/freescale/t102xqds/ddr.c
parente26416a3f1631b906776a4e965313b3269faf259 (diff)
downloadblackbird-obmc-uboot-2c537642e98969e1810c6fdeff3099584f674a66.tar.gz
blackbird-obmc-uboot-2c537642e98969e1810c6fdeff3099584f674a66.zip
mpc85xx/t102xqds: convert deep sleep to generic board interface
A new deep sleep interface is introduced to support generic board structure. Converts it to use new interface. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/t102xqds/ddr.c')
-rw-r--r--board/freescale/t102xqds/ddr.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/board/freescale/t102xqds/ddr.c b/board/freescale/t102xqds/ddr.c
index 46fc64e528..2d4d10f351 100644
--- a/board/freescale/t102xqds/ddr.c
+++ b/board/freescale/t102xqds/ddr.c
@@ -11,6 +11,7 @@
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <asm/fsl_law.h>
+#include <asm/mpc85xx_gpio.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -152,6 +153,19 @@ found:
#endif
}
+#if defined(CONFIG_DEEP_SLEEP)
+void board_mem_sleep_setup(void)
+{
+ void __iomem *qixis_base = (void *)QIXIS_BASE;
+
+ /* does not provide HW signals for power management */
+ clrbits_8(qixis_base + 0x21, 0x2);
+ /* Disable MCKE isolation */
+ gpio_set_value(2, 0);
+ udelay(1);
+}
+#endif
+
phys_size_t initdram(int board_type)
{
phys_size_t dram_size;
@@ -166,5 +180,10 @@ phys_size_t initdram(int board_type)
/* DDR has been initialised by first stage boot loader */
dram_size = fsl_ddr_sdram_size();
#endif
+
+#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
+ fsl_dp_resume();
+#endif
+
return dram_size;
}
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