diff options
| author | York Sun <yorksun@freescale.com> | 2012-07-06 17:10:33 -0500 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-07-06 17:30:33 -0500 |
| commit | 48f6a5c348453fc3ab33aaa91e5e4198a28678ff (patch) | |
| tree | f1adc995cec4ced7d867de36230f1aa600c4d216 /board/freescale/p1_p2_rdb | |
| parent | 1e9ea85f7dffe949ca5e4845e6336810c144e06d (diff) | |
| download | blackbird-obmc-uboot-48f6a5c348453fc3ab33aaa91e5e4198a28678ff.tar.gz blackbird-obmc-uboot-48f6a5c348453fc3ab33aaa91e5e4198a28678ff.zip | |
powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER()
We don't care E bit of SVR in most cases. Clear E bit for SVR_SOC_VER().
This will simplify the coding. Use IS_E_PROCESSOR() to identify SoC with
encryption. Remove all _E entries from SVR list and CPU list.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/p1_p2_rdb')
| -rw-r--r-- | board/freescale/p1_p2_rdb/ddr.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c index 71c60888ac..916439c17f 100644 --- a/board/freescale/p1_p2_rdb/ddr.c +++ b/board/freescale/p1_p2_rdb/ddr.c @@ -204,8 +204,7 @@ phys_size_t fixed_sdram (void) cpu = gd->cpu; /* P1020 and it's derivatives support max 32bit DDR width */ - if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1020_E || - cpu->soc_ver == SVR_P1011 || cpu->soc_ver == SVR_P1011_E) { + if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) { ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2); } else { ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; @@ -232,8 +231,7 @@ phys_size_t fixed_sdram (void) strmhz(buf, ddr_freq)); /* P1020 and it's derivatives support max 32bit DDR width */ - if(cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1020_E || - cpu->soc_ver == SVR_P1011 || cpu->soc_ver == SVR_P1011_E) { + if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) { ddr_cfg_regs.ddr_sdram_cfg |= SDRAM_CFG_32_BE; ddr_cfg_regs.cs[0].bnds = 0x0000001F; } |
