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authorKumar Gala <galak@kernel.crashing.org>2010-07-08 22:27:30 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-07-16 10:55:10 -0500
commit9f43d7997e9c5395eed4eddd32cd75942896a412 (patch)
tree53951582f24cf5840a7ea93cc9e327b857ab5017 /board/freescale/p1022ds
parentc7e1a43de6818eb0b40d0b8db4f1a2bc54185eeb (diff)
downloadblackbird-obmc-uboot-9f43d7997e9c5395eed4eddd32cd75942896a412.tar.gz
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powerpc/85xx: Move p1022ds slot code into board file
The code to map SERDES configs to slot names is board specific and not chip specific. Thus it should live in board/freescale/p1022ds/ and not in arch/powerpc/cpu/. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/p1022ds')
-rw-r--r--board/freescale/p1022ds/p1022ds.c69
1 files changed, 69 insertions, 0 deletions
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index 970a0d5565..be692cb458 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -121,6 +121,75 @@ int misc_init_r(void)
return 0;
}
+/*
+ * A list of PCI and SATA slots
+ */
+enum slot_id {
+ SLOT_PCIE1 = 1,
+ SLOT_PCIE2,
+ SLOT_PCIE3,
+ SLOT_PCIE4,
+ SLOT_PCIE5,
+ SLOT_SATA1,
+ SLOT_SATA2
+};
+
+/*
+ * This array maps the slot identifiers to their names on the P1022DS board.
+ */
+static const char *slot_names[] = {
+ [SLOT_PCIE1] = "Slot 1",
+ [SLOT_PCIE2] = "Slot 2",
+ [SLOT_PCIE3] = "Slot 3",
+ [SLOT_PCIE4] = "Slot 4",
+ [SLOT_PCIE5] = "Mini-PCIe",
+ [SLOT_SATA1] = "SATA 1",
+ [SLOT_SATA2] = "SATA 2",
+};
+
+/*
+ * This array maps a given SERDES configuration and SERDES device to the PCI or
+ * SATA slot that it connects to. This mapping is hard-coded in the FPGA.
+ */
+static u8 serdes_dev_slot[][SATA2 + 1] = {
+ [0x01] = { [PCIE3] = SLOT_PCIE4, [PCIE2] = SLOT_PCIE5 },
+ [0x02] = { [SATA1] = SLOT_SATA1, [SATA2] = SLOT_SATA2 },
+ [0x09] = { [PCIE1] = SLOT_PCIE1, [PCIE3] = SLOT_PCIE4,
+ [PCIE2] = SLOT_PCIE5 },
+ [0x16] = { [PCIE1] = SLOT_PCIE1, [PCIE3] = SLOT_PCIE2,
+ [PCIE2] = SLOT_PCIE3,
+ [SATA1] = SLOT_SATA1, [SATA2] = SLOT_SATA2 },
+ [0x17] = { [PCIE1] = SLOT_PCIE1, [PCIE3] = SLOT_PCIE2,
+ [PCIE2] = SLOT_PCIE3 },
+ [0x1a] = { [PCIE1] = SLOT_PCIE1, [PCIE2] = SLOT_PCIE3,
+ [PCIE2] = SLOT_PCIE3,
+ [SATA1] = SLOT_SATA1, [SATA2] = SLOT_SATA2 },
+ [0x1c] = { [PCIE1] = SLOT_PCIE1,
+ [SATA1] = SLOT_SATA1, [SATA2] = SLOT_SATA2 },
+ [0x1e] = { [PCIE1] = SLOT_PCIE1, [PCIE3] = SLOT_PCIE3 },
+ [0x1f] = { [PCIE1] = SLOT_PCIE1 },
+};
+
+
+/*
+ * Returns the name of the slot to which the PCIe or SATA controller is
+ * connected
+ */
+const char *serdes_slot_name(enum srds_prtcl device)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ u32 pordevsr = in_be32(&gur->pordevsr);
+ unsigned int srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+ MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+ enum slot_id slot = serdes_dev_slot[srds_cfg][device];
+ const char *name = slot_names[slot];
+
+ if (name)
+ return name;
+ else
+ return "Nothing";
+}
+
static void configure_pcie(struct fsl_pci_info *info,
struct pci_controller *hose,
const char *connected)
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