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| author | chenhui zhao <chenhui.zhao@freescale.com> | 2011-10-13 13:40:59 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-10-13 23:38:10 -0500 |
| commit | fff80975ae97d90418ee8989aff5a28ebaf95c5b (patch) | |
| tree | f8398cd84e756c71726beb932d58622b87130ff8 /board/freescale/mpc8548cds/law.c | |
| parent | 34fdbdf8d9819a3348b1340a5fba8ae00e768fd2 (diff) | |
| download | blackbird-obmc-uboot-fff80975ae97d90418ee8989aff5a28ebaf95c5b.tar.gz blackbird-obmc-uboot-fff80975ae97d90418ee8989aff5a28ebaf95c5b.zip | |
powerpc/mpc8548cds: Code cleanup and refactoring
- Rework tlb and law tables.
- PCI2 is not available on MPC8548CDS, so remove it.
- Move the memory map to the board config file.
- Rewrite the board info according to the manual.
- Remove unnecessary macros and redefine some macros to align with other boards.
- Fix some typos.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8548cds/law.c')
| -rw-r--r-- | board/freescale/mpc8548cds/law.c | 31 |
1 files changed, 2 insertions, 29 deletions
diff --git a/board/freescale/mpc8548cds/law.c b/board/freescale/mpc8548cds/law.c index 5b6943da9e..efd90401c1 100644 --- a/board/freescale/mpc8548cds/law.c +++ b/board/freescale/mpc8548cds/law.c @@ -27,36 +27,9 @@ #include <asm/fsl_law.h> #include <asm/mmu.h> -/* - * LAW(Local Access Window) configuration: - * - * 0x0000_0000 0x7fff_ffff DDR 2G - * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xa000_0000 0xbfff_ffff PCIe MEM 512M - * 0xc000_0000 0xdfff_ffff RapidIO 512M - * 0xe000_0000 0xe000_ffff CCSR 1M - * 0xe200_0000 0xe10f_ffff PCI1 IO 1M - * 0xe280_0000 0xe20f_ffff PCI2 IO 1M - * 0xe300_0000 0xe30f_ffff PCIe IO 1M - * 0xf000_0000 0xf3ff_ffff SDRAM 64M - * 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M - * 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M - * 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M - * - * Notes: - * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. - * If flash is 8M at default position (last 8M), no LAW needed. - * - * LAW 0 is reserved for boot mapping - */ - struct law_entry law_table[] = { -#ifdef CONFIG_SYS_PCI2_MEM_PHYS - SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), -#endif - /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ - SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + /* LBC window - maps 256M */ + SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); |
