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authorDinh Nguyen <dinguyen@opensource.altera.com>2015-04-15 16:44:33 -0500
committerMarek Vasut <marex@denx.de>2015-04-21 12:23:17 +0200
commit8b73dda86b5ce3c1f67385e812d79785f95157f1 (patch)
treeee4589fc6a8fb7791d73e90cef0a3148b16472ad /board/freescale/ls2085a/ddr.h
parent0ef44d1150cfae5eb5eaea27db129547ac9f1ff7 (diff)
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arm: socfpga: spl: update peripheral pll for dev kit
"commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration" mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct value should be 79. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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