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| author | Mingkai Hu <Mingkai.Hu@freescale.com> | 2013-07-04 17:33:43 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-08-09 12:41:42 -0700 |
| commit | a8d9758d0162f2eb8589be9d60b833241f043c6d (patch) | |
| tree | db43b08523ff4336f28edd0db2a74c26dc7fc9c1 /board/freescale/c29xpcie/law.c | |
| parent | 3b75e98273532ed0135846345e367ac4992b1a51 (diff) | |
| download | blackbird-obmc-uboot-a8d9758d0162f2eb8589be9d60b833241f043c6d.tar.gz blackbird-obmc-uboot-a8d9758d0162f2eb8589be9d60b833241f043c6d.zip | |
powerpc/c29xpcie: add support for C29XPCIE board
C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE board, C293PCIE board and C291PCIE board.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
- 64MB x16 NOR flash and 4GB x8 NAND flash
- 16MB SPI flash
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Singed-off-by: Po Liu <Po.Liu@freescale.com>
[yorksun: Fixup include/configs/C29XPCIE.h]
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/c29xpcie/law.c')
| -rw-r--r-- | board/freescale/c29xpcie/law.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/board/freescale/c29xpcie/law.c b/board/freescale/c29xpcie/law.c new file mode 100644 index 0000000000..10a2fbf5ed --- /dev/null +++ b/board/freescale/c29xpcie/law.c @@ -0,0 +1,22 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +struct law_entry law_table[] = { + SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_IFC), + SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), + SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_16K, LAW_TRGT_IF_IFC), + SET_LAW(CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS, LAW_SIZE_512K, + LAW_TRGT_IF_PLATFORM_SRAM), +}; + +int num_law_entries = ARRAY_SIZE(law_table); |
