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authorYork Sun <yorksun@freescale.com>2012-10-26 16:40:14 +0000
committerAndy Fleming <afleming@freescale.com>2012-11-27 18:28:06 -0600
commit765ad3cf4d6f60f6104289d05bfa39d562c83859 (patch)
tree5483a1fbc3b8e885b3a16cf60149c888609e6ce8 /board/etin
parent0118033b6700fc96a84a8c0593af3cbe2f10a6dc (diff)
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powerpc/corenet_ds: Update DDR timing for single-rank DIMMs
Single rank UDIMM timing has been verified with HMT325U7BFR8C-H9 for speed 800, 900, 1000, 1200, 1300MT/s. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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