VOH405 board update

1 files changed, 91 insertions, 8 deletions

diff --git a/board/esd/voh405/voh405.c b/board/esd/voh405/voh405.c
index d73db40eae..9cea69f18c 100644
--- a/board/esd/voh405/voh405.c
+++ b/board/esd/voh405/voh405.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001-2003
+ * (C) Copyright 2001-2004
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
  * See file CREDITS for list of people who contributed to this
@@ -33,6 +33,7 @@
 #endif
 
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern void lxt971_no_sleep(void);
 
 /* fpga configuration data - gzip compressed and generated by bin2c */
 const unsigned char fpgadata[] =
@@ -50,6 +51,28 @@ const unsigned char fpgadata[] =
 int gunzip(void *, int, unsigned char *, unsigned long *);
 
 
+/* logo bitmap data - gzip compressed and generated by bin2c */
+unsigned char logo_bmp_320[] =
+{
+#include "logo_320_240_4bpp.c"
+};
+
+unsigned char logo_bmp_640[] =
+{
+#include "logo_640_480_24bpp.c"
+};
+
+
+/*
+ * include common lcd code (for esd boards)
+ */
+#include "../common/lcd.c"
+
+#include "../common/s1d13704_320_240_4bpp.h"
+#include "../common/s1d13806_320_240_4bpp.h"
+#include "../common/s1d13806_640_480_16bpp.h"
+
+
 int board_early_init_f (void)
 {
 	/*
@@ -81,8 +104,6 @@ int board_early_init_f (void)
 }
 
 
-/* ------------------------------------------------------------------------- */
-
 int misc_init_f (void)
 {
 	return 0;  /* dummy implementation */
@@ -93,13 +114,16 @@ int misc_init_r (void)
 {
 	volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
 	volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
-	volatile unsigned short *lcd_reg =
+	volatile unsigned short *lcd_contrast =
 		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL + 4);
+	volatile unsigned short *lcd_backlight =
+		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL + 6);
 	unsigned char *dst;
 	ulong len = sizeof(fpgadata);
 	int status;
 	int index;
 	int i;
+	char *str;
 
 	dst = malloc(CFG_FPGA_MAX_SIZE);
 	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
@@ -154,11 +178,12 @@ int misc_init_r (void)
 	free(dst);
 
 	/*
-	 * Reset FPGA via FPGA_DATA pin
+	 * Reset FPGA via FPGA_INIT pin
 	 */
-	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_INIT); /* setup FPGA_INIT as output */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~FPGA_INIT);  /* reset low */
 	udelay(1000); /* wait 1ms */
-	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	out32(GPIO0_OR, in32(GPIO0_OR) | FPGA_INIT);   /* reset high */
 	udelay(1000); /* wait 1ms */
 
 	/*
@@ -182,9 +207,56 @@ int misc_init_r (void)
 	*duart1_mcr = 0x08;
 
 	/*
+	 * Init lcd interface and display logo
+	 */
+	str = getenv("bd_type");
+	if (strcmp(str, "voh405_bw") == 0) {
+		lcd_setup(0, 1);
+		lcd_init((uchar *)CFG_LCD_SMALL_REG, (uchar *)CFG_LCD_SMALL_MEM,
+			 regs_13704_320_240_4bpp,
+			 sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
+			 logo_bmp_320, sizeof(logo_bmp_320));
+	} else if (strcmp(str, "voh405_bwbw") == 0) {
+		lcd_setup(0, 1);
+		lcd_init((uchar *)CFG_LCD_SMALL_REG, (uchar *)CFG_LCD_SMALL_MEM,
+			 regs_13704_320_240_4bpp,
+			 sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
+			 logo_bmp_320, sizeof(logo_bmp_320));
+		lcd_setup(1, 1);
+		lcd_init((uchar *)CFG_LCD_BIG_REG, (uchar *)CFG_LCD_BIG_MEM,
+			 regs_13806_320_240_4bpp,
+			 sizeof(regs_13806_320_240_4bpp)/sizeof(regs_13806_320_240_4bpp[0]),
+			 logo_bmp_320, sizeof(logo_bmp_320));
+	} else if (strcmp(str, "voh405_bwc") == 0) {
+		lcd_setup(0, 1);
+		lcd_init((uchar *)CFG_LCD_SMALL_REG, (uchar *)CFG_LCD_SMALL_MEM,
+			 regs_13704_320_240_4bpp,
+			 sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
+			 logo_bmp_320, sizeof(logo_bmp_320));
+		lcd_setup(1, 0);
+		lcd_init((uchar *)CFG_LCD_BIG_REG, (uchar *)CFG_LCD_BIG_MEM,
+			 regs_13806_640_480_16bpp,
+			 sizeof(regs_13806_640_480_16bpp)/sizeof(regs_13806_640_480_16bpp[0]),
+			 logo_bmp_640, sizeof(logo_bmp_640));
+	} else {
+		printf("Unsupported bd_type defined (%s) -> No display configured!\n", str);
+		return 0;
+	}
+
+	/*
+	 * Set invert bit in small lcd controller
+	 */
+	*(unsigned char *)(CFG_LCD_SMALL_REG + 2) |= 0x01;
+
+	/*
 	 * Set default contrast voltage on epson vga controller
 	 */
-	*lcd_reg = 0x4848;
+	*lcd_contrast = 0x4646;
+
+	/*
+	 * Enable backlight
+	 */
+	*lcd_backlight = 0xffff;
 
 	return (0);
 }
@@ -207,8 +279,19 @@ int checkboard (void)
 		puts(str);
 	}
 
+	if (getenv_r("bd_type", str, sizeof(str)) != -1) {
+		printf(" (%s)", str);
+	} else {
+		puts(" (Missing bd_type!)");
+	}
+
 	putc ('\n');
 
+	/*
+	 * Disable sleep mode in LXT971
+	 */
+	lxt971_no_sleep();
+
 	return 0;
 }