diff options
| author | Stefan Roese <sr@denx.de> | 2006-01-18 20:03:15 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2006-01-18 20:03:15 +0100 |
| commit | 2076d0a15ff1dba2b46d96e81d02d625254611ff (patch) | |
| tree | 022f104e6f363e11a0b47b9305fa04e0caccec3d /board/esd/cpci2dp | |
| parent | c4b465f63e3b6fc998526dc217ff988e5c91e667 (diff) | |
| download | blackbird-obmc-uboot-2076d0a15ff1dba2b46d96e81d02d625254611ff.tar.gz blackbird-obmc-uboot-2076d0a15ff1dba2b46d96e81d02d625254611ff.zip | |
PMC405 and CPCI405: Moved configuration of pci resources into config file.
PMC405 and CPCI2DP: Added firmware download and booting via pci.
Patch by Matthias Fuchs, 20 Dec 2005
Diffstat (limited to 'board/esd/cpci2dp')
| -rw-r--r-- | board/esd/cpci2dp/Makefile | 2 | ||||
| -rw-r--r-- | board/esd/cpci2dp/cpci2dp.c | 32 |
2 files changed, 11 insertions, 23 deletions
diff --git a/board/esd/cpci2dp/Makefile b/board/esd/cpci2dp/Makefile index a60495a59a..88b0ae3435 100644 --- a/board/esd/cpci2dp/Makefile +++ b/board/esd/cpci2dp/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS = $(BOARD).o flash.o ../common/misc.o +OBJS = $(BOARD).o flash.o ../common/misc.o ../common/cmd_loadpci.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c index df10c0e6aa..2800420e2a 100644 --- a/board/esd/cpci2dp/cpci2dp.c +++ b/board/esd/cpci2dp/cpci2dp.c @@ -31,17 +31,15 @@ int board_early_init_f (void) unsigned long cntrl0Reg; /* - * Setup GPIO pins (CS4+CS7 as GPIO) + * Setup GPIO pins */ cntrl0Reg = mfdcr(cntrl0); - mtdcr(cntrl0, cntrl0Reg | 0x00900000); + mtdcr(cntrl0, cntrl0Reg | ((CFG_EEPROM_WP | CFG_PB_LED | CFG_SELF_RST | CFG_INTA_FAKE) << 5)); - /* set output pins to high */ - out32(GPIO0_OR, CFG_INTA_FAKE | CFG_EEPROM_WP | CFG_PB_LED); - /* INTA# is open drain */ - out32(GPIO0_ODR, CFG_INTA_FAKE); - /* setup for output */ - out32(GPIO0_TCR, CFG_INTA_FAKE | CFG_EEPROM_WP); + /* set output pins to high */ + out32(GPIO0_OR, CFG_EEPROM_WP); + /* setup for output (LED=off) */ + out32(GPIO0_TCR, CFG_EEPROM_WP | CFG_PB_LED); /* * IRQ 0-15 405GP internally generated; active high; level sensitive @@ -130,16 +128,6 @@ long int initdram (int board_type) /* ------------------------------------------------------------------------- */ -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 64 MB - ok\n"); - - return (0); -} - -/* ------------------------------------------------------------------------- */ - #if defined(CFG_EEPROM_WREN) /* Input: <dev_addr> I2C address of EEPROM device to enable. * <state> -1: deliver current state @@ -207,8 +195,8 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD( - eepwren, 2, 0, do_eep_wren, - "eepwren - Enable / disable / query EEPROM write access\n", - NULL - ); + eepwren, 2, 0, do_eep_wren, + "eepwren - Enable / disable / query EEPROM write access\n", + NULL + ); #endif /* #if defined(CFG_EEPROM_WREN) */ |
