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| author | Stefan Roese <sr@denx.de> | 2013-02-07 02:10:11 +0000 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2013-03-09 08:17:51 +0100 |
| commit | d4451d3503e630fa0d70a58dcfc759e07a9017d1 (patch) | |
| tree | 292759999e195143c5e0321ce82f36d19ee4c7fc /board/a3m071/is46r16320d.h | |
| parent | b4dc0bddbf1bfa8697ae888d472c25d82d52dc95 (diff) | |
| download | blackbird-obmc-uboot-d4451d3503e630fa0d70a58dcfc759e07a9017d1.tar.gz blackbird-obmc-uboot-d4451d3503e630fa0d70a58dcfc759e07a9017d1.zip | |
mpc5200: Add a4m2k board port
This patch adds the a4m2k MPC5200B board port. Its a derivate of
the a3m071 board with only minor changes.
Additionally this patch includes some clean-up changes:
- Remove I2C support from a3m071 as its unused
- Fix/enhance default env variables
- Fix some comments
- Add newly introduced CONFIG_SPL_TARGET to automatically build
"u-boot-img.bin"
- Fix dtb patching in READ desciption for SPL Linux booting:
"fdt chosen" needs to get called to patch/create the chosen node.
- Add missing call to spl_board_init():
Define CONFIG_SPL_BOARD_INIT so that spl_board_init() will get
called in the SPL version.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/a3m071/is46r16320d.h')
| -rw-r--r-- | board/a3m071/is46r16320d.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/board/a3m071/is46r16320d.h b/board/a3m071/is46r16320d.h new file mode 100644 index 0000000000..8183d81469 --- /dev/null +++ b/board/a3m071/is46r16320d.h @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define SDRAM_DDR /* is DDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +/* see is46r16320d datasheet and MPC5200UM chap. 8.6.1. */ + +/* SDRAM Config Standard timing */ +#define SDRAM_MODE 0x008d0000 +#define SDRAM_EMODE 0x40010000 +#define SDRAM_CONTROL 0x70430f00 +#define SDRAM_CONFIG1 0x33622930 +#define SDRAM_CONFIG2 0x46670000 +#define SDRAM_TAPDELAY 0x10000000 + +#else +#error CONFIG_MPC5200 not defined +#endif |
