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| author | Bin Meng <bmeng.cn@gmail.com> | 2016-02-01 01:40:54 -0800 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-02-05 12:47:22 +0800 |
| commit | 2b94d9fca2bef8cffd5ad56f609aed1f0d024900 (patch) | |
| tree | c093d10333e6cf9a0f45b91d8ed4cfdbd7b3b7d7 /arch/x86 | |
| parent | 9e36c53dd0b86d8e19c764945401440dee65d016 (diff) | |
| download | blackbird-obmc-uboot-2b94d9fca2bef8cffd5ad56f609aed1f0d024900.tar.gz blackbird-obmc-uboot-2b94d9fca2bef8cffd5ad56f609aed1f0d024900.zip | |
x86: tnc: Use DM PCI API in disable_igd()
Once we get udevice of IGD and SDVO, we can use its udevice to
access PCI configuration space with dm_pci_write_config32().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/cpu/queensbay/tnc.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index 8b79505819..38082c4a77 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -5,9 +5,10 @@ */ #include <common.h> +#include <dm.h> +#include <pci.h> #include <asm/io.h> #include <asm/irq.h> -#include <asm/pci.h> #include <asm/post.h> #include <asm/arch/device.h> #include <asm/arch/tnc.h> @@ -16,6 +17,21 @@ static int __maybe_unused disable_igd(void) { + struct udevice *igd, *sdvo; + int ret; + + ret = dm_pci_bus_find_bdf(TNC_IGD, &igd); + if (ret) + return ret; + if (!igd) + return 0; + + ret = dm_pci_bus_find_bdf(TNC_SDVO, &sdvo); + if (ret) + return ret; + if (!sdvo) + return 0; + /* * According to Atom E6xx datasheet, setting VGA Disable (bit17) * of Graphics Controller register (offset 0x50) prevents IGD @@ -34,8 +50,8 @@ static int __maybe_unused disable_igd(void) * two devices will be completely disabled (invisible in the PCI * configuration space) unless a system reset is performed. */ - x86_pci_write_config32(TNC_IGD, IGD_FD, FUNC_DISABLE); - x86_pci_write_config32(TNC_SDVO, IGD_FD, FUNC_DISABLE); + dm_pci_write_config32(igd, IGD_FD, FUNC_DISABLE); + dm_pci_write_config32(sdvo, IGD_FD, FUNC_DISABLE); return 0; } |
