Merge branch 'master' of git://git.denx.de/u-boot-x86

7 files changed, 159 insertions, 29 deletions

diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h
new file mode 100644
index 0000000000..e539890c33
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	Intel
+ */
+
+#ifndef __FSP_CONFIGS_H__
+#define __FSP_CONFIGS_H__
+
+struct fsp_config_data {
+	struct fsp_cfg_common	common;
+	struct upd_region	fsp_upd;
+};
+
+struct fspinit_rtbuf {
+	struct common_buf	common;	/* FSP common runtime data structure */
+};
+
+#endif /* __FSP_CONFIGS_H__ */
diff --git a/arch/x86/include/asm/arch-ivybridge/pch.h b/arch/x86/include/asm/arch-ivybridge/pch.h
index 21df083842..31437c8618 100644
--- a/arch/x86/include/asm/arch-ivybridge/pch.h
+++ b/arch/x86/include/asm/arch-ivybridge/pch.h
@@ -105,6 +105,8 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
 #define GPIO_ROUT		0xb8
 
 #define LPC_IO_DEC		0x80 /* IO Decode Ranges Register */
+#define  COMB_DEC_RANGE		(1 << 4)  /* 0x2f8-0x2ff (COM2) */
+#define  COMA_DEC_RANGE		(0 << 0)  /* 0x3f8-0x3ff (COM1) */
 #define LPC_EN			0x82 /* LPC IF Enables Register */
 #define  CNF2_LPC_EN		(1 << 13) /* 0x4e/0x4f */
 #define  CNF1_LPC_EN		(1 << 12) /* 0x2e/0x2f */
@@ -121,6 +123,14 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
 #define LPC_GEN3_DEC		0x8c /* LPC IF Generic Decode Range 3 */
 #define LPC_GEN4_DEC		0x90 /* LPC IF Generic Decode Range 4 */
 #define LPC_GENX_DEC(x)		(0x84 + 4 * (x))
+#define  GEN_DEC_RANGE_256B	0xfc0000  /* 256 Bytes */
+#define  GEN_DEC_RANGE_128B	0x7c0000  /* 128 Bytes */
+#define  GEN_DEC_RANGE_64B	0x3c0000  /* 64 Bytes */
+#define  GEN_DEC_RANGE_32B	0x1c0000  /* 32 Bytes */
+#define  GEN_DEC_RANGE_16B	0x0c0000  /* 16 Bytes */
+#define  GEN_DEC_RANGE_8B	0x040000  /* 8 Bytes */
+#define  GEN_DEC_RANGE_4B	0x000000  /* 4 Bytes */
+#define  GEN_DEC_RANGE_EN	(1 << 0)  /* Range Enable */
 
 /* PCI Configuration Space (D31:F1): IDE */
 #define PCH_IDE_DEV		PCI_BDF(0, 0x1f, 1)
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h
new file mode 100644
index 0000000000..e539890c33
--- /dev/null
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	Intel
+ */
+
+#ifndef __FSP_CONFIGS_H__
+#define __FSP_CONFIGS_H__
+
+struct fsp_config_data {
+	struct fsp_cfg_common	common;
+	struct upd_region	fsp_upd;
+};
+
+struct fspinit_rtbuf {
+	struct common_buf	common;	/* FSP common runtime data structure */
+};
+
+#endif /* __FSP_CONFIGS_H__ */
diff --git a/arch/x86/include/asm/fsp/fsp_api.h b/arch/x86/include/asm/fsp/fsp_api.h
index 2d34d138ab..afafb30c14 100644
--- a/arch/x86/include/asm/fsp/fsp_api.h
+++ b/arch/x86/include/asm/fsp/fsp_api.h
@@ -11,6 +11,16 @@
 #include <linux/linkage.h>
 
 /*
+ * FSP common configuration structure.
+ * This needs to be included in the platform-specific struct fsp_config_data.
+ */
+struct fsp_cfg_common {
+	struct fsp_header	*fsp_hdr;
+	u32			stack_top;
+	u32			boot_mode;
+};
+
+/*
  * FspInit continuation function prototype.
  * Control will be returned to this callback function after FspInit API call.
  */
@@ -30,7 +40,7 @@ struct common_buf {
 	 * Stack top pointer used by the bootloader. The new stack frame will be
 	 * set up at this location after FspInit API call.
 	 */
-	u32	*stack_top;
+	u32	stack_top;
 	u32	boot_mode;	/* Current system boot mode */
 	void	*upd_data;	/* User platform configuraiton data region */
 	u32	reserved[7];	/* Reserved */
diff --git a/arch/x86/include/asm/fsp/fsp_platform.h b/arch/x86/include/asm/fsp/fsp_platform.h
deleted file mode 100644
index 61286ceb46..0000000000
--- a/arch/x86/include/asm/fsp/fsp_platform.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (C) 2013, Intel Corporation
- * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:	Intel
- */
-
-#ifndef __FSP_PLATFORM_H__
-#define __FSP_PLATFORM_H__
-
-struct fspinit_rtbuf {
-	struct common_buf	common;	/* FSP common runtime data structure */
-};
-
-#endif
diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h
index 7317dda902..61d811f70e 100644
--- a/arch/x86/include/asm/fsp/fsp_support.h
+++ b/arch/x86/include/asm/fsp/fsp_support.h
@@ -13,16 +13,10 @@
 #include "fsp_ffs.h"
 #include "fsp_api.h"
 #include "fsp_hob.h"
-#include "fsp_platform.h"
 #include "fsp_infoheader.h"
 #include "fsp_bootmode.h"
 #include <asm/arch/fsp/fsp_vpd.h>
-
-struct shared_data {
-	struct fsp_header	*fsp_hdr;
-	u32			*stack_top;
-	struct upd_region	fsp_upd;
-};
+#include <asm/arch/fsp/fsp_configs.h>
 
 #define FSP_LOWMEM_BASE		0x100000UL
 #define FSP_HIGHMEM_BASE	0x100000000ULL
@@ -49,14 +43,12 @@ void fsp_init_done(void *hob_list);
 /**
  * FSP Continuation function
  *
- * @shared_data: Shared data base before stack migration
  * @status:      Always 0
  * @hob_list:    HOB list pointer
  *
  * @retval:      Never returns
  */
-void fsp_continue(struct shared_data *shared_data, u32 status,
-		  void *hob_list);
+void fsp_continue(u32 status, void *hob_list);
 
 /**
  * Find FSP header offset in FSP image
@@ -199,13 +191,15 @@ void *fsp_get_nvs_data(const void *hob_list, u32 *len);
 void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len);
 
 /**
- * This function overrides the default configurations in the UPD data region.
+ * This function overrides the default configurations of FSP.
  *
- * @fsp_upd: A pointer to the upd_region data strcture
+ * @config:  A pointer to the FSP configuration data structure
+ * @rt_buf:  A pointer to the FSP runtime buffer data structure
  *
  * @return:  None
  */
-void update_fsp_upd(struct upd_region *fsp_upd);
+void update_fsp_configs(struct fsp_config_data *config,
+			struct fspinit_rtbuf *rt_buf);
 
 /**
  * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init
diff --git a/arch/x86/include/asm/fw_cfg.h b/arch/x86/include/asm/fw_cfg.h
new file mode 100644
index 0000000000..fb110fa8e7
--- /dev/null
+++ b/arch/x86/include/asm/fw_cfg.h
@@ -0,0 +1,93 @@
+/*
+ * (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __FW_CFG__
+#define __FW_CFG__
+
+#define FW_CONTROL_PORT	0x510
+#define FW_DATA_PORT		0x511
+#define FW_DMA_PORT_LOW	0x514
+#define FW_DMA_PORT_HIGH	0x518
+
+enum qemu_fwcfg_items {
+	FW_CFG_SIGNATURE	= 0x00,
+	FW_CFG_ID		= 0x01,
+	FW_CFG_UUID		= 0x02,
+	FW_CFG_RAM_SIZE		= 0x03,
+	FW_CFG_NOGRAPHIC	= 0x04,
+	FW_CFG_NB_CPUS		= 0x05,
+	FW_CFG_MACHINE_ID	= 0x06,
+	FW_CFG_KERNEL_ADDR	= 0x07,
+	FW_CFG_KERNEL_SIZE	= 0x08,
+	FW_CFG_KERNEL_CMDLINE   = 0x09,
+	FW_CFG_INITRD_ADDR	= 0x0a,
+	FW_CFG_INITRD_SIZE	= 0x0b,
+	FW_CFG_BOOT_DEVICE	= 0x0c,
+	FW_CFG_NUMA		= 0x0d,
+	FW_CFG_BOOT_MENU	= 0x0e,
+	FW_CFG_MAX_CPUS		= 0x0f,
+	FW_CFG_KERNEL_ENTRY	= 0x10,
+	FW_CFG_KERNEL_DATA	= 0x11,
+	FW_CFG_INITRD_DATA	= 0x12,
+	FW_CFG_CMDLINE_ADDR	= 0x13,
+	FW_CFG_CMDLINE_SIZE	= 0x14,
+	FW_CFG_CMDLINE_DATA	= 0x15,
+	FW_CFG_SETUP_ADDR	= 0x16,
+	FW_CFG_SETUP_SIZE	= 0x17,
+	FW_CFG_SETUP_DATA	= 0x18,
+	FW_CFG_FILE_DIR		= 0x19,
+	FW_CFG_FILE_FIRST	= 0x20,
+	FW_CFG_WRITE_CHANNEL	= 0x4000,
+	FW_CFG_ARCH_LOCAL	= 0x8000,
+	FW_CFG_INVALID		= 0xffff,
+};
+
+#define FW_CFG_FILE_SLOTS	0x10
+#define FW_CFG_MAX_ENTRY	(FW_CFG_FILE_FIRST + FW_CFG_FILE_SLOTS)
+#define FW_CFG_ENTRY_MASK	 ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)
+
+#define FW_CFG_MAX_FILE_PATH	56
+
+#define QEMU_FW_CFG_SIGNATURE	(('Q' << 24) | ('E' << 16) | ('M' << 8) | 'U')
+
+#define FW_CFG_DMA_ERROR	(1 << 0)
+#define FW_CFG_DMA_READ	(1 << 1)
+#define FW_CFG_DMA_SKIP	(1 << 2)
+#define FW_CFG_DMA_SELECT	(1 << 3)
+
+#define FW_CFG_DMA_ENABLED	(1 << 1)
+
+struct fw_cfg_file {
+	__be32 size;
+	__be16 select;
+	__be16 reserved;
+	char name[FW_CFG_MAX_FILE_PATH];
+};
+
+struct fw_cfg_files {
+	__be32 count;
+	struct fw_cfg_file files[];
+};
+
+struct fw_cfg_dma_access {
+	__be32 control;
+	__be32 length;
+	__be64 address;
+};
+
+/**
+ * Initialize QEMU fw_cfg interface
+ */
+void qemu_fwcfg_init(void);
+
+/**
+ * Get system cpu number
+ *
+ * @return:   cpu number in system
+ */
+int qemu_fwcfg_online_cpus(void);
+
+#endif