x86: ivybridge: Drop XHCI support

This is not used on link which is the only ivybridge board. Drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

2 files changed, 0 insertions, 33 deletions

diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile
index ac41853e21..45ef14187e 100644
--- a/arch/x86/cpu/ivybridge/Makefile
+++ b/arch/x86/cpu/ivybridge/Makefile
@@ -17,4 +17,3 @@ obj-y += northbridge.o
 obj-y += report_platform.o
 obj-y += sata.o
 obj-y += sdram.o
-obj-y += usb_xhci.o
diff --git a/arch/x86/cpu/ivybridge/usb_xhci.c b/arch/x86/cpu/ivybridge/usb_xhci.c
deleted file mode 100644
index f77b80489b..0000000000
--- a/arch/x86/cpu/ivybridge/usb_xhci.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * From Coreboot
- * Copyright (C) 2008-2009 coresystems GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <asm/pci.h>
-#include <asm/arch/pch.h>
-
-void bd82x6x_usb_xhci_init(pci_dev_t dev)
-{
-	u32 reg32;
-
-	debug("XHCI: Setting up controller.. ");
-
-	/* lock overcurrent map */
-	reg32 = x86_pci_read_config32(dev, 0x44);
-	reg32 |= 1;
-	x86_pci_write_config32(dev, 0x44, reg32);
-
-	/* Enable clock gating */
-	reg32 = x86_pci_read_config32(dev, 0x40);
-	reg32 &= ~((1 << 20) | (1 << 21));
-	reg32 |= (1 << 19) | (1 << 18) | (1 << 17);
-	reg32 |= (1 << 10) | (1 << 9) | (1 << 8);
-	reg32 |= (1 << 31); /* lock */
-	x86_pci_write_config32(dev, 0x40, reg32);
-
-	debug("done.\n");
-}