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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-10-14 13:28:52 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-10-18 00:36:48 -0500 |
| commit | 4d28db8a1e8b90e1e3ffd95d7f949b849e33fa2f (patch) | |
| tree | b016278fbd84bfa1afd3e3fedf29dab7f82ba72e /arch/powerpc/include/asm/immap_85xx.h | |
| parent | 9c42ef61454ff7b4da23767366620a947b2486b5 (diff) | |
| download | blackbird-obmc-uboot-4d28db8a1e8b90e1e3ffd95d7f949b849e33fa2f.tar.gz blackbird-obmc-uboot-4d28db8a1e8b90e1e3ffd95d7f949b849e33fa2f.zip | |
powerpc/85xx: Add support for RMan LIODN initialization
This patch is intended to initialize RMan LIODN related registers on
P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to
qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/immap_85xx.h')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 1bbf9867af..99fe97d087 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2339,6 +2339,16 @@ struct ccsr_raide { }; #endif +#ifdef CONFIG_SYS_DPAA_RMAN +struct ccsr_rman { + u8 res0[0xf64]; + u32 mmliodnbr; /* Message Manager LIODN Base Register */ + u32 mmitar; /* RMAN Inbound Translation Address Register */ + u32 mmitdr; /* RMAN Inbound Translation Data Register */ + u8 res4[0x1f090]; +}; +#endif + #ifdef CONFIG_FSL_CORENET #define CONFIG_SYS_FSL_CORENET_CCM_OFFSET 0x0000 #define CONFIG_SYS_MPC85xx_DDR_OFFSET 0x8000 @@ -2354,6 +2364,7 @@ struct ccsr_raide { #define CONFIG_SYS_MPC85xx_ESDHC_OFFSET 0x114000 #define CONFIG_SYS_MPC85xx_LBC_OFFSET 0x124000 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000 +#define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x200000 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x201000 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 @@ -2442,6 +2453,8 @@ struct ccsr_raide { (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_PME_OFFSET) #define CONFIG_SYS_FSL_RAID_ENGINE_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_RAID_ENGINE_OFFSET) +#define CONFIG_SYS_FSL_CORENET_RMAN_ADDR \ + (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET) #define CONFIG_SYS_MPC85xx_GUTS_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET) #define CONFIG_SYS_FSL_CORENET_CCM_ADDR \ |
