ppc4xx: Remove support for PPC405CR CPUs

This patch removes support for the APM 405CR CPU.
This CPU is EOL and no board uses this chip.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>

5 files changed, 11 insertions, 27 deletions

diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
index cad61f3e7c..50c28a0d39 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
@@ -17,7 +17,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+#if defined(CONFIG_405GP) || \
     defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
     defined(CONFIG_405EX) || defined(CONFIG_440)
 
@@ -68,7 +68,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define UDIV_SUBTRACT	0
 #define UART0_SDR	SDR0_UART0
 #define UART1_SDR	SDR0_UART1
-#else /* CONFIG_405GP || CONFIG_405CR */
+#else /* CONFIG_405GP */
 #define CR0_MASK        0x00001fff
 #define CR0_EXTCLK_ENA  0x000000c0
 #define CR0_UDIV_POS    1
@@ -173,7 +173,7 @@ int get_serial_clock(void)
 	 * Let's handle this in some #ifdef's for the SoC's.
 	 */
 
-#if defined(CONFIG_405CR) || defined(CONFIG_405GP)
+#if defined(CONFIG_405GP)
 	reg = mfdcr(CPC0_CR0) & ~CR0_MASK;
 #ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
 	clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
@@ -200,7 +200,7 @@ int get_serial_clock(void)
 #else
 	clk = CONFIG_SYS_BASE_BAUD * 16;
 #endif
-#endif /* CONFIG_405CR */
+#endif
 
 #if defined(CONFIG_405EP)
 	{
@@ -265,4 +265,4 @@ int get_serial_clock(void)
 
 	return clk;
 }
-#endif	/* CONFIG_405GP || CONFIG_405CR */
+#endif	/* CONFIG_405GP */
diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index fe050985e5..5cebafdbae 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -320,25 +320,9 @@ int checkcpu (void)
 		puts("405GP Rev. D");
 		break;
 
-#ifdef CONFIG_405GP
-	case PVR_405GP_RE: /* 405GP rev E and 405CR rev C have same PVR */
+	case PVR_405GP_RE:
 		puts("405GP Rev. E");
 		break;
-#endif
-
-	case PVR_405CR_RA:
-		puts("405CR Rev. A");
-		break;
-
-	case PVR_405CR_RB:
-		puts("405CR Rev. B");
-		break;
-
-#ifdef CONFIG_405CR
-	case PVR_405CR_RC: /* 405GP rev E and 405CR rev C have same PVR */
-		puts("405CR Rev. C");
-		break;
-#endif
 
 	case PVR_405GPR_RB:
 		puts("405GPr Rev. B");
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index d53d882511..d465dcda8b 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -326,7 +326,7 @@ cpu_init_f (void)
 	 * External Bus Controller (EBC) Setup
 	 */
 #if (defined(CONFIG_SYS_EBC_PB0AP) && defined(CONFIG_SYS_EBC_PB0CR))
-#if (defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+#if (defined(CONFIG_405GP) || \
      defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
      defined(CONFIG_405EX) || defined(CONFIG_405))
 	/*
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 3345e73347..7e077d5a9f 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
 
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR)
+#if defined(CONFIG_405GP)
 
 void get_sys_info (PPC4xx_SYS_INFO * sysInfo)
 {
@@ -1184,7 +1184,7 @@ ulong get_bus_freq (ulong dummy)
 {
 	ulong val;
 
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+#if defined(CONFIG_405GP) || \
     defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
     defined(CONFIG_405EX) || defined(CONFIG_405) || \
     defined(CONFIG_440)
diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index c2125e796b..d9d8cbffaa 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -794,7 +794,7 @@ _start:
 #endif /* CONFIG_440 */
 
 /*****************************************************************************/
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+#if defined(CONFIG_405GP) || \
     defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
     defined(CONFIG_405EX) || defined(CONFIG_405)
 	/*----------------------------------------------------------------------- */
@@ -1064,7 +1064,7 @@ _start:
 
 #endif /* CONFIG_NAND_SPL */
 
-#endif	/* CONFIG_405GP || CONFIG_405CR || CONFIG_405 || CONFIG_405EP */
+#endif	/* CONFIG_405GP || CONFIG_405 || CONFIG_405EP */
 	/*----------------------------------------------------------------------- */