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authorWolfgang Denk <wd@denx.de>2011-03-27 21:20:29 +0200
committerWolfgang Denk <wd@denx.de>2011-03-27 21:20:29 +0200
commitc04bf5e9a45d7335681352faa125193258f8e976 (patch)
treeab512a5a8356b6f492100925acb63638a7c10ce9 /arch/arm
parentb0c5ceb305054aadf2f810b0b7bfcc94926b78ad (diff)
parent05858736f5f1050d776571451995db81e3f5a5d7 (diff)
downloadblackbird-obmc-uboot-c04bf5e9a45d7335681352faa125193258f8e976.tar.gz
blackbird-obmc-uboot-c04bf5e9a45d7335681352faa125193258f8e976.zip
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/arm1136/start.S4
-rw-r--r--arch/arm/cpu/arm1136/u-boot.lds4
-rw-r--r--arch/arm/cpu/arm1176/start.S6
-rw-r--r--arch/arm/cpu/arm1176/u-boot.lds4
-rw-r--r--arch/arm/cpu/arm720t/start.S4
-rw-r--r--arch/arm/cpu/arm720t/u-boot.lds4
-rw-r--r--arch/arm/cpu/arm920t/ep93xx/u-boot.lds2
-rw-r--r--arch/arm/cpu/arm920t/start.S4
-rw-r--r--arch/arm/cpu/arm920t/u-boot.lds4
-rw-r--r--arch/arm/cpu/arm925t/start.S4
-rw-r--r--arch/arm/cpu/arm925t/u-boot.lds4
-rw-r--r--arch/arm/cpu/arm926ejs/start.S4
-rw-r--r--arch/arm/cpu/arm926ejs/u-boot.lds4
-rw-r--r--arch/arm/cpu/arm946es/start.S4
-rw-r--r--arch/arm/cpu/arm946es/u-boot.lds4
-rw-r--r--arch/arm/cpu/arm_intcm/start.S4
-rw-r--r--arch/arm/cpu/arm_intcm/u-boot.lds4
-rw-r--r--arch/arm/cpu/armv7/s5p-common/Makefile1
-rw-r--r--arch/arm/cpu/armv7/s5p-common/pwm.c189
-rw-r--r--arch/arm/cpu/armv7/s5p-common/timer.c76
-rw-r--r--arch/arm/cpu/armv7/start.S4
-rw-r--r--arch/arm/cpu/armv7/u-boot.lds4
-rw-r--r--arch/arm/cpu/ixp/start.S4
-rw-r--r--arch/arm/cpu/ixp/u-boot.lds4
-rw-r--r--arch/arm/cpu/lh7a40x/start.S4
-rw-r--r--arch/arm/cpu/lh7a40x/u-boot.lds4
-rw-r--r--arch/arm/cpu/pxa/start.S4
-rw-r--r--arch/arm/cpu/pxa/u-boot.lds4
-rw-r--r--arch/arm/cpu/s3c44b0/start.S4
-rw-r--r--arch/arm/cpu/s3c44b0/u-boot.lds4
-rw-r--r--arch/arm/cpu/sa1100/start.S4
-rw-r--r--arch/arm/cpu/sa1100/u-boot.lds4
-rw-r--r--arch/arm/include/asm/arch-s5pc1xx/mmc.h5
-rw-r--r--arch/arm/include/asm/arch-s5pc1xx/pwm.h23
-rw-r--r--arch/arm/include/asm/arch-s5pc2xx/mmc.h5
-rw-r--r--arch/arm/include/asm/arch-s5pc2xx/pwm.h23
-rw-r--r--arch/arm/include/asm/u-boot-arm.h1
-rw-r--r--arch/arm/lib/board.c2
38 files changed, 353 insertions, 88 deletions
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index a05d36d726..3c5f3ef5fa 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -102,6 +102,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/arm1136/u-boot.lds b/arch/arm/cpu/arm1136/u-boot.lds
index 253adbe479..d1e28518ad 100644
--- a/arch/arm/cpu/arm1136/u-boot.lds
+++ b/arch/arm/cpu/arm1136/u-boot.lds
@@ -72,11 +72,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 363329afbe..b095f22f68 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -121,6 +121,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
/* IRQ stack memory (calculated at run-time) + 8 bytes */
@@ -352,9 +356,11 @@ clbss_l:str r2, [r0] /* clear loop... */
cmp r0, r1
bne clbss_l
+#ifndef CONFIG_NAND_SPL
bl coloured_LED_init
bl red_LED_on
#endif
+#endif
/*
* We are done. Do not return, instead branch to second part of board
diff --git a/arch/arm/cpu/arm1176/u-boot.lds b/arch/arm/cpu/arm1176/u-boot.lds
index fe31800532..27d66380bd 100644
--- a/arch/arm/cpu/arm1176/u-boot.lds
+++ b/arch/arm/cpu/arm1176/u-boot.lds
@@ -61,11 +61,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index c0981185f6..e774c3ff67 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -91,6 +91,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/arm720t/u-boot.lds b/arch/arm/cpu/arm720t/u-boot.lds
index 0686e423e2..9370fadcf5 100644
--- a/arch/arm/cpu/arm720t/u-boot.lds
+++ b/arch/arm/cpu/arm720t/u-boot.lds
@@ -62,11 +62,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
index 5bfcb02317..dc6ba34082 100644
--- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
+++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
@@ -55,5 +55,7 @@ SECTIONS
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
+ __bss_end__ = .;
+
_end = .;
}
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 2fc0abc1a4..a7476b0550 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -87,6 +87,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/arm920t/u-boot.lds b/arch/arm/cpu/arm920t/u-boot.lds
index a6f8b56a3a..17ba60423b 100644
--- a/arch/arm/cpu/arm920t/u-boot.lds
+++ b/arch/arm/cpu/arm920t/u-boot.lds
@@ -71,11 +71,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index 20ecdd54c6..39f2e997d2 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -97,6 +97,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/arm925t/u-boot.lds b/arch/arm/cpu/arm925t/u-boot.lds
index 7b53edb9be..64e76f55e3 100644
--- a/arch/arm/cpu/arm925t/u-boot.lds
+++ b/arch/arm/cpu/arm925t/u-boot.lds
@@ -66,11 +66,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index f4c177e523..fefcfa2f88 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -131,6 +131,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/arm926ejs/u-boot.lds b/arch/arm/cpu/arm926ejs/u-boot.lds
index 28c91f937c..1480e0c960 100644
--- a/arch/arm/cpu/arm926ejs/u-boot.lds
+++ b/arch/arm/cpu/arm926ejs/u-boot.lds
@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 296effc7b7..00914f42e9 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -103,6 +103,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/arm946es/u-boot.lds b/arch/arm/cpu/arm946es/u-boot.lds
index eb91979711..ff938e44d8 100644
--- a/arch/arm/cpu/arm946es/u-boot.lds
+++ b/arch/arm/cpu/arm946es/u-boot.lds
@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index e8518e261d..2fd3b9a05a 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -99,6 +99,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/arm_intcm/u-boot.lds b/arch/arm/cpu/arm_intcm/u-boot.lds
index 3b5c18d72a..f4a146c9a8 100644
--- a/arch/arm/cpu/arm_intcm/u-boot.lds
+++ b/arch/arm/cpu/arm_intcm/u-boot.lds
@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile
index 922cd95448..ce0a41e2c1 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -27,6 +27,7 @@ LIB = $(obj)libs5p-common.o
COBJS-y += cpu_info.o
COBJS-y += timer.o
+COBJS-$(CONFIG_PWM) += pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c b/arch/arm/cpu/armv7/s5p-common/pwm.c
new file mode 100644
index 0000000000..ff95b84f55
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/pwm.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <pwm.h>
+#include <asm/io.h>
+#include <asm/arch/pwm.h>
+#include <asm/arch/clk.h>
+
+int pwm_enable(int pwm_id)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon |= TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon &= ~TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_pwm_clk();
+
+ for (div = 2; div <= 16; div *= 2) {
+ if ((tin_parent_rate / (div << 16)) < freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (1000000000UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long timer_rate_hz;
+ unsigned long tcmp;
+
+ /*
+ * We currently avoid using 64bit arithmetic by using the
+ * fact that anything faster than 1GHz is easily representable
+ * by 32bits.
+ */
+ if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns > period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+ timer_rate_hz = tin_rate;
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns;
+
+ /* Note, counters count down */
+ tcmp = duty_ns / tin_ns;
+ tcmp = tcnt - tcmp;
+
+ /*
+ * the pwm hw only checks the compare register after a decrement,
+ * so the pin never toggles if tcmp = tcnt
+ */
+ if (tcmp == tcnt)
+ tcmp--;
+
+ if (tcmp < 0)
+ tcmp = 0;
+
+ /* Update the PWM register block. */
+ offset = pwm_id * 3;
+ if (pwm_id < 4) {
+ writel(tcnt, &pwm->tcntb0 + offset);
+ writel(tcmp, &pwm->tcmpb0 + offset);
+ }
+
+ tcon = readl(&pwm->tcon);
+ tcon |= TCON_UPDATE(pwm_id);
+ if (pwm_id < 4)
+ tcon |= TCON_AUTO_RELOAD(pwm_id);
+ else
+ tcon |= TCON4_AUTO_RELOAD;
+ writel(tcon, &pwm->tcon);
+
+ tcon &= ~TCON_UPDATE(pwm_id);
+ writel(tcon, &pwm->tcon);
+
+ return 0;
+}
+
+int pwm_init(int pwm_id, int div, int invert)
+{
+ u32 val;
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned long timer_rate_hz;
+ unsigned int offset, prescaler;
+
+ /*
+ * Timer Freq(HZ) =
+ * PWM_CLK / { (prescaler_value + 1) * (divider_value) }
+ */
+
+ val = readl(&pwm->tcfg0);
+ if (pwm_id < 2) {
+ prescaler = PRESCALER_0;
+ val &= ~0xff;
+ val |= (prescaler & 0xff);
+ } else {
+ prescaler = PRESCALER_1;
+ val &= ~(0xff << 8);
+ val |= (prescaler & 0xff) << 8;
+ }
+ writel(val, &pwm->tcfg0);
+ val = readl(&pwm->tcfg1);
+ val &= ~(0xf << MUX_DIV_SHIFT(pwm_id));
+ val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id);
+ writel(val, &pwm->tcfg1);
+
+ timer_rate_hz = get_pwm_clk() / ((prescaler + 1) *
+ (div + 1));
+
+ timer_rate_hz = timer_rate_hz / 100;
+
+ /* set count value */
+ offset = pwm_id * 3;
+ writel(timer_rate_hz, &pwm->tcntb0 + offset);
+
+ val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id));
+ if (invert && (pwm_id < 4))
+ val |= TCON_INVERTER(pwm_id);
+ writel(val, &pwm->tcon);
+
+ pwm_enable(pwm_id);
+
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c
index 651fd5ddff..b750d16141 100644
--- a/arch/arm/cpu/armv7/s5p-common/timer.c
+++ b/arch/arm/cpu/armv7/s5p-common/timer.c
@@ -27,21 +27,9 @@
#include <asm/io.h>
#include <asm/arch/pwm.h>
#include <asm/arch/clk.h>
+#include <pwm.h>
-#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
-#define MUX_DIV_2 1 /* 1/2 period */
-#define MUX_DIV_4 2 /* 1/4 period */
-#define MUX_DIV_8 3 /* 1/8 period */
-#define MUX_DIV_16 4 /* 1/16 period */
-#define MUX4_DIV_SHIFT 16
-
-#define TCON_TIMER4_SHIFT 20
-
-static unsigned long count_value;
-
-/* Internal tick units */
-static unsigned long long timestamp; /* Monotonic incrementing timer */
-static unsigned long lastdec; /* Last decremneter snapshot */
+DECLARE_GLOBAL_DATA_PTR;
/* macro to read the 16 bit timer */
static inline struct s5p_timer *s5p_get_base_timer(void)
@@ -51,41 +39,10 @@ static inline struct s5p_timer *s5p_get_base_timer(void)
int timer_init(void)
{
- struct s5p_timer *const timer = s5p_get_base_timer();
- u32 val;
-
- /*
- * @ PWM Timer 4
- * Timer Freq(HZ) =
- * PWM_CLK / { (prescaler_value + 1) * (divider_value) }
- */
-
- /* set prescaler : 16 */
- /* set divider : 2 */
- writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0);
- writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1);
-
- /* count_value = 2085937.5(HZ) (per 1 sec)*/
- count_value = get_pwm_clk() / ((PRESCALER_1 + 1) *
- (MUX_DIV_2 + 1));
-
- /* count_value / 100 = 20859.375(HZ) (per 10 msec) */
- count_value = count_value / 100;
-
- /* set count value */
- writel(count_value, &timer->tcntb4);
- lastdec = count_value;
-
- val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) |
- TCON4_AUTO_RELOAD;
-
- /* auto reload & manual update */
- writel(val | TCON4_UPDATE, &timer->tcon);
-
- /* start PWM timer 4 */
- writel(val | TCON4_START, &timer->tcon);
-
- timestamp = 0;
+ /* PWM Timer 4 */
+ pwm_init(4, MUX_DIV_2, 0);
+ pwm_config(4, 0, 0);
+ pwm_enable(4);
return 0;
}
@@ -105,14 +62,14 @@ unsigned long get_timer(unsigned long base)
void set_timer(unsigned long t)
{
- timestamp = t;
+ gd->tbl = t;
}
/* delay x useconds */
void __udelay(unsigned long usec)
{
struct s5p_timer *const timer = s5p_get_base_timer();
- unsigned long tmo, tmp;
+ unsigned long tmo, tmp, count_value;
count_value = readl(&timer->tcntb4);
@@ -137,7 +94,7 @@ void __udelay(unsigned long usec)
tmp = get_timer(0);
/* if setting this fordward will roll time stamp */
- /* reset "advancing" timestamp to 0, set lastdec value */
+ /* reset "advancing" timestamp to 0, set lastinc value */
/* else, set advancing stamp wake up time */
if ((tmo + tmp + 1) < tmp)
reset_timer_masked();
@@ -154,23 +111,24 @@ void reset_timer_masked(void)
struct s5p_timer *const timer = s5p_get_base_timer();
/* reset time */
- lastdec = readl(&timer->tcnto4);
- timestamp = 0;
+ gd->lastinc = readl(&timer->tcnto4);
+ gd->tbl = 0;
}
unsigned long get_timer_masked(void)
{
struct s5p_timer *const timer = s5p_get_base_timer();
unsigned long now = readl(&timer->tcnto4);
+ unsigned long count_value = readl(&timer->tcntb4);
- if (lastdec >= now)
- timestamp += lastdec - now;
+ if (gd->lastinc >= now)
+ gd->tbl += gd->lastinc - now;
else
- timestamp += lastdec + count_value - now;
+ gd->tbl += gd->lastinc + count_value - now;
- lastdec = now;
+ gd->lastinc = now;
- return timestamp;
+ return gd->tbl;
}
/*
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index cb4f92f3a9..d83d501837 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -79,6 +79,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/armv7/u-boot.lds b/arch/arm/cpu/armv7/u-boot.lds
index 5725c30c69..dbae54d4f8 100644
--- a/arch/arm/cpu/armv7/u-boot.lds
+++ b/arch/arm/cpu/armv7/u-boot.lds
@@ -66,11 +66,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index f71a398d31..561c1f4795 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -110,6 +110,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds
index a55eb8a509..3587f8aa6b 100644
--- a/arch/arm/cpu/ixp/u-boot.lds
+++ b/arch/arm/cpu/ixp/u-boot.lds
@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S
index 1457427aae..81242b1ed4 100644
--- a/arch/arm/cpu/lh7a40x/start.S
+++ b/arch/arm/cpu/lh7a40x/start.S
@@ -87,6 +87,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/lh7a40x/u-boot.lds b/arch/arm/cpu/lh7a40x/u-boot.lds
index 463237d916..30934ff3e3 100644
--- a/arch/arm/cpu/lh7a40x/u-boot.lds
+++ b/arch/arm/cpu/lh7a40x/u-boot.lds
@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index d2d391e6d2..f1dbc3b35d 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -104,6 +104,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/pxa/u-boot.lds b/arch/arm/cpu/pxa/u-boot.lds
index 0818d0b6ea..e163369bc3 100644
--- a/arch/arm/cpu/pxa/u-boot.lds
+++ b/arch/arm/cpu/pxa/u-boot.lds
@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index 9c9c3b3b88..10f5284d45 100644
--- a/arch/arm/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
@@ -78,6 +78,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/s3c44b0/u-boot.lds b/arch/arm/cpu/s3c44b0/u-boot.lds
index ac29440182..74a259c0d5 100644
--- a/arch/arm/cpu/s3c44b0/u-boot.lds
+++ b/arch/arm/cpu/s3c44b0/u-boot.lds
@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 815d70488b..b27e970152 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -88,6 +88,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/cpu/sa1100/u-boot.lds b/arch/arm/cpu/sa1100/u-boot.lds
index fa6d05cdf7..e6381dacf6 100644
--- a/arch/arm/cpu/sa1100/u-boot.lds
+++ b/arch/arm/cpu/sa1100/u-boot.lds
@@ -66,11 +66,13 @@ SECTIONS
*(.dynsym)
}
+ _end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
- _end = .;
+ __bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/include/asm/arch-s5pc1xx/mmc.h b/arch/arm/include/asm/arch-s5pc1xx/mmc.h
index 48de64d9c3..d458d3bb8e 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/mmc.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/mmc.h
@@ -53,10 +53,11 @@ struct s5p_mmc {
unsigned char res3[0x34];
unsigned int control2;
unsigned int control3;
+ unsigned char res4[4];
unsigned int control4;
- unsigned char res4[0x6e];
+ unsigned char res5[0x6e];
unsigned short hcver;
- unsigned char res5[0xFFF02];
+ unsigned char res6[0xFFF00];
};
struct mmc_host {
diff --git a/arch/arm/include/asm/arch-s5pc1xx/pwm.h b/arch/arm/include/asm/arch-s5pc1xx/pwm.h
index 0369968d4a..d0cf3cb853 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/pwm.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/pwm.h
@@ -22,12 +22,25 @@
#ifndef __ASM_ARM_ARCH_PWM_H_
#define __ASM_ARM_ARCH_PWM_H_
-/* Interval mode(Auto Reload) of PWM Timer 4 */
+#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */
+#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
+
+/* Divider MUX */
+#define MUX_DIV_1 0 /* 1/1 period */
+#define MUX_DIV_2 1 /* 1/2 period */
+#define MUX_DIV_4 2 /* 1/4 period */
+#define MUX_DIV_8 3 /* 1/8 period */
+#define MUX_DIV_16 4 /* 1/16 period */
+
+#define MUX_DIV_SHIFT(x) (x * 4)
+
+#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2)
+
+#define TCON_START(x) (1 << TCON_OFFSET(x))
+#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1))
+#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2))
+#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3))
#define TCON4_AUTO_RELOAD (1 << 22)
-/* Update TCNTB4 */
-#define TCON4_UPDATE (1 << 21)
-/* start bit of PWM Timer 4 */
-#define TCON4_START (1 << 20)
#ifndef __ASSEMBLY__
struct s5p_timer {
diff --git a/arch/arm/include/asm/arch-s5pc2xx/mmc.h b/arch/arm/include/asm/arch-s5pc2xx/mmc.h
index 528150d755..04827cad75 100644
--- a/arch/arm/include/asm/arch-s5pc2xx/mmc.h
+++ b/arch/arm/include/asm/arch-s5pc2xx/mmc.h
@@ -53,10 +53,11 @@ struct s5p_mmc {
unsigned char res3[0x34];
unsigned int control2;
unsigned int control3;
+ unsigned char res4[4];
unsigned int control4;
- unsigned char res4[0x6e];
+ unsigned char res5[0x6e];
unsigned short hcver;
- unsigned char res5[0xFF02];
+ unsigned char res6[0xFF00];
};
struct mmc_host {
diff --git a/arch/arm/include/asm/arch-s5pc2xx/pwm.h b/arch/arm/include/asm/arch-s5pc2xx/pwm.h
index 0369968d4a..d0cf3cb853 100644
--- a/arch/arm/include/asm/arch-s5pc2xx/pwm.h
+++ b/arch/arm/include/asm/arch-s5pc2xx/pwm.h
@@ -22,12 +22,25 @@
#ifndef __ASM_ARM_ARCH_PWM_H_
#define __ASM_ARM_ARCH_PWM_H_
-/* Interval mode(Auto Reload) of PWM Timer 4 */
+#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */
+#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
+
+/* Divider MUX */
+#define MUX_DIV_1 0 /* 1/1 period */
+#define MUX_DIV_2 1 /* 1/2 period */
+#define MUX_DIV_4 2 /* 1/4 period */
+#define MUX_DIV_8 3 /* 1/8 period */
+#define MUX_DIV_16 4 /* 1/16 period */
+
+#define MUX_DIV_SHIFT(x) (x * 4)
+
+#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2)
+
+#define TCON_START(x) (1 << TCON_OFFSET(x))
+#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1))
+#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2))
+#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3))
#define TCON4_AUTO_RELOAD (1 << 22)
-/* Update TCNTB4 */
-#define TCON4_UPDATE (1 << 21)
-/* start bit of PWM Timer 4 */
-#define TCON4_START (1 << 20)
#ifndef __ASSEMBLY__
struct s5p_timer {
diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index 33973a32e0..3904027016 100644
--- a/arch/arm/include/asm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
@@ -32,6 +32,7 @@
/* for the following variables, see start.S */
extern ulong _bss_start_ofs; /* BSS start relative to _start */
extern ulong _bss_end_ofs; /* BSS end relative to _start */
+extern ulong _end_ofs; /* end of image relative to _start */
extern ulong IRQ_STACK_START; /* top of IRQ stack */
extern ulong FIQ_STACK_START; /* top of FIQ stack */
extern ulong _TEXT_BASE; /* code start */
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index c620d2c200..dc46e21dba 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -459,7 +459,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
- monitor_flash_len = _bss_start_ofs;
+ monitor_flash_len = _end_ofs;
debug ("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */
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