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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-01-31 22:55:38 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-02-25 07:59:50 +0100 |
| commit | 9608e7de6ac13626e8a2809b0350add57c1343ac (patch) | |
| tree | 2ba3415bbcac8a8cd39c7d6056c7d347a3bbda4d /arch/arm/mach-orion5x | |
| parent | c1b0fad9b655e0251c686cd129eb2f933fcc6b3a (diff) | |
| download | blackbird-obmc-uboot-9608e7de6ac13626e8a2809b0350add57c1343ac.tar.gz blackbird-obmc-uboot-9608e7de6ac13626e8a2809b0350add57c1343ac.zip | |
edminiv2: switch to SPL
ED Mini V2 is based on Orion 5x which boots at fixed
address 0xFFFF0000 in NOR Flash. Place SPL there, and
switch U-Boot from .bin to .img format, stored in
NOR Flash at 0xFFF90000.
Note: this patch was tested on HW and works, i.e.
it boots U-Boot properly, but SPL console output
currently does not appear, due to GD being trashed
by arch/arm/lib/spl.c. This trashing is soon to be
removed, and then ED Mini V2 SPL console output will
become visible.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/mach-orion5x')
| -rw-r--r-- | arch/arm/mach-orion5x/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-orion5x/cpu.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-orion5x/lowlevel_init.S | 14 |
3 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 5a542629c7..291c511ba8 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -5,6 +5,7 @@ choice config TARGET_EDMINIV2 bool "LaCie Ethernet Disk mini V2" + select SUPPORT_SPL endchoice diff --git a/arch/arm/mach-orion5x/cpu.c b/arch/arm/mach-orion5x/cpu.c index f88db3b1f9..2ecd385678 100644 --- a/arch/arm/mach-orion5x/cpu.c +++ b/arch/arm/mach-orion5x/cpu.c @@ -234,7 +234,9 @@ int arch_cpu_init(void) /* Enable and invalidate L2 cache in write through mode */ invalidate_l2_cache(); +#ifdef CONFIG_SPL_BUILD orion5x_config_adr_windows(); +#endif return 0; } diff --git a/arch/arm/mach-orion5x/lowlevel_init.S b/arch/arm/mach-orion5x/lowlevel_init.S index 4dacc296e4..51a8b3c51b 100644 --- a/arch/arm/mach-orion5x/lowlevel_init.S +++ b/arch/arm/mach-orion5x/lowlevel_init.S @@ -62,14 +62,16 @@ /* * Low-level init happens right after start.S has switched to SVC32, * flushed and disabled caches and disabled MMU. We're still running - * from the boot chip select, so the first thing we should do is set - * up RAM for us to relocate into. + * from the boot chip select, so the first thing SPL should do is to + * set up the RAM to copy U-Boot into. */ .globl lowlevel_init lowlevel_init: +#ifdef CONFIG_SPL_BUILD + /* Use 'r4 as the base for internal register accesses */ ldr r4, =ORION5X_REGS_PHY_BASE @@ -273,5 +275,13 @@ lowlevel_init: orr r2, r2, r6 str r2, [r3, #0x484] + /* enable for 2 GB DDR; detection should find out real amount */ + sub r6, r6, r6 + str r6, [r3, #0x500] + ldr r6, =0x7fff0001 + str r6, [r3, #0x504] + +#endif /* CONFIG_SPL_BUILD */ + /* Return to U-boot via saved link register */ mov pc, lr |
