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authorMatt Porter <mporter@konsulko.com>2015-05-05 15:00:23 -0400
committerTom Rini <trini@konsulko.com>2015-05-28 08:18:23 -0400
commitf99993c10882f7dc8ec35993d5febe59aac01e6a (patch)
treec91edb5481c62885690884d2197a3634e1171652 /arch/arm/lib
parentc777efe3a1c3ea62123437a30468fa0b17a689b2 (diff)
downloadblackbird-obmc-uboot-f99993c10882f7dc8ec35993d5febe59aac01e6a.tar.gz
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common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it to 1 to stay in thumb mode. Signed-off-by: Matt Porter <mporter@konsulko.com>
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/Makefile1
-rw-r--r--arch/arm/lib/cmd_boot.c44
2 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 0e1ad0e3dd..31a5c8d77f 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -26,6 +26,7 @@ ifndef CONFIG_SYS_GENERIC_BOARD
obj-y += board.o
endif
+obj-$(CONFIG_CPU_V7M) += cmd_boot.o
obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
diff --git a/arch/arm/lib/cmd_boot.c b/arch/arm/lib/cmd_boot.c
new file mode 100644
index 0000000000..37bb6a567e
--- /dev/null
+++ b/arch/arm/lib/cmd_boot.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2008-2011
+ * Graeme Russ, <graeme.russ@gmail.com>
+ *
+ * (C) Copyright 2002
+ * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
+ *
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * ARMv7M does not support ARM instruction mode. However, the
+ * interworking BLX and BX instructions do encode the ARM/Thumb
+ * field in bit 0. This means that when executing any Branch
+ * and eXchange instruction we must set bit 0 to one to guarantee
+ * that we keep the processor in Thumb instruction mode. From The
+ * ARMv7-M Instruction Set A4.1.1:
+ * "ARMv7-M only supports the Thumb instruction execution state,
+ * therefore the value of address bit [0] must be 1 in interworking
+ * instructions, otherwise a fault occurs."
+ */
+unsigned long do_go_exec(ulong (*entry)(int, char * const []),
+ int argc, char * const argv[])
+{
+ ulong addr = (ulong)entry | 1;
+ entry = (void *)addr;
+
+ return entry(argc, argv);
+}
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