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authorHeiko Schocher <hs@denx.de>2013-08-19 16:38:56 +0200
committerTom Rini <trini@ti.com>2013-08-28 11:44:59 -0400
commitdafd4db33a99f05616f02283f6fd3ba065278dcb (patch)
tree7f636b99e8139870aaa0ae31b12eb0ea2a458fb7 /arch/arm/include
parent457bb50560c983fc69090dad1fb16b128e88a520 (diff)
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arm, am33xx: add defines for gmii_sel_register bits
Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-am33xx/cpu.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 10b56e0db4..f77ac1e844 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -486,6 +486,25 @@ struct ctrl_dev {
unsigned int resv4[4];
unsigned int miisel; /* offset 0x50 */
};
+
+/* gmii_sel register defines */
+#define GMII1_SEL_MII 0x0
+#define GMII1_SEL_RMII 0x1
+#define GMII1_SEL_RGMII 0x2
+#define GMII2_SEL_MII 0x0
+#define GMII2_SEL_RMII 0x4
+#define GMII2_SEL_RGMII 0x8
+#define RGMII1_IDMODE BIT(4)
+#define RGMII2_IDMODE BIT(5)
+#define RMII1_IO_CLK_EN BIT(6)
+#define RMII2_IO_CLK_EN BIT(7)
+
+#define MII_MODE_ENABLE (GMII1_SEL_MII | GMII2_SEL_MII)
+#define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII)
+#define RGMII_MODE_ENABLE (GMII1_SEL_RGMII | GMII2_SEL_RGMII)
+#define RGMII_INT_DELAY (RGMII1_IDMODE | RGMII2_IDMODE)
+#define RMII_CHIPCKL_ENABLE (RMII1_IO_CLK_EN | RMII2_IO_CLK_EN)
+
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL_STRICT_NAMES */
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