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authorTom Warren <twarren@nvidia.com>2013-03-25 16:22:26 -0700
committerTom Warren <twarren@nvidia.com>2013-04-15 11:01:38 -0700
commitd0edce4fa394325a0ccfd38a5d668fb5ee1af34d (patch)
tree5a7ea0c182d9b2c33699fcfff230f83ba7b4ff84 /arch/arm/include/asm/spl.h
parent85434f9d7123c283b2233614178e7cfc968d329b (diff)
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Tegra: Configure L2 cache control reg properly.
Without this change, kernel fails at calling function cache_clean_flush during kernel early boot. Aprocryphally, intended for T114 only, so I check for a T114 SoC. Works (i.e. dalmore 3.8 kernel now starts printing to console). Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/spl.h')
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