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authorChin Liang See <clsee@altera.com>2013-12-02 12:01:39 -0600
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-12-03 14:38:56 +0100
commit4c54419737ffbfadd605263d97a1357bb03c04e8 (patch)
tree3b603e925909764e8903b605693486801e6bf94a /arch/arm/include/asm/arch-socfpga
parent77524d2c9d81e97c54e704b65c8a02e4bec0f441 (diff)
downloadblackbird-obmc-uboot-4c54419737ffbfadd605263d97a1357bb03c04e8.tar.gz
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socfpga: Adding Freeze Controller driver
Adding Freeze Controller driver. All HPS IOs need to be in freeze state during pin mux or IO buffer configuration. It is to avoid any glitch which might happen during the configuration from propagating to external devices. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/include/asm/arch-socfpga')
-rw-r--r--arch/arm/include/asm/arch-socfpga/freeze_controller.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-socfpga/freeze_controller.h b/arch/arm/include/asm/arch-socfpga/freeze_controller.h
new file mode 100644
index 0000000000..120f20e038
--- /dev/null
+++ b/arch/arm/include/asm/arch-socfpga/freeze_controller.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2013 Altera Corporation <www.altera.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _FREEZE_CONTROLLER_H_
+#define _FREEZE_CONTROLLER_H_
+
+struct socfpga_freeze_controller {
+ u32 vioctrl;
+ u32 padding[3];
+ u32 hioctrl;
+ u32 src;
+ u32 hwctrl;
+};
+
+#define FREEZE_CHANNEL_NUM (4)
+
+typedef enum {
+ FREEZE_CTRL_FROZEN = 0,
+ FREEZE_CTRL_THAWED = 1
+} FREEZE_CTRL_CHAN_STATE;
+
+#define SYSMGR_FRZCTRL_ADDRESS 0x40
+#define SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW 0x0
+#define SYSMGR_FRZCTRL_SRC_VIO1_ENUM_HW 0x1
+#define SYSMGR_FRZCTRL_VIOCTRL_SLEW_MASK 0x00000010
+#define SYSMGR_FRZCTRL_VIOCTRL_WKPULLUP_MASK 0x00000008
+#define SYSMGR_FRZCTRL_VIOCTRL_TRISTATE_MASK 0x00000004
+#define SYSMGR_FRZCTRL_VIOCTRL_BUSHOLD_MASK 0x00000002
+#define SYSMGR_FRZCTRL_VIOCTRL_CFG_MASK 0x00000001
+#define SYSMGR_FRZCTRL_HIOCTRL_SLEW_MASK 0x00000010
+#define SYSMGR_FRZCTRL_HIOCTRL_WKPULLUP_MASK 0x00000008
+#define SYSMGR_FRZCTRL_HIOCTRL_TRISTATE_MASK 0x00000004
+#define SYSMGR_FRZCTRL_HIOCTRL_BUSHOLD_MASK 0x00000002
+#define SYSMGR_FRZCTRL_HIOCTRL_CFG_MASK 0x00000001
+#define SYSMGR_FRZCTRL_HIOCTRL_REGRST_MASK 0x00000080
+#define SYSMGR_FRZCTRL_HIOCTRL_OCTRST_MASK 0x00000040
+#define SYSMGR_FRZCTRL_HIOCTRL_OCT_CFGEN_CALSTART_MASK 0x00000100
+#define SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK 0x00000020
+#define SYSMGR_FRZCTRL_HWCTRL_VIO1REQ_MASK 0x00000001
+#define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_FROZEN 0x2
+#define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_THAWED 0x1
+#define SYSMGR_FRZCTRL_VIOCTRL_SHIFT 0x2
+
+void sys_mgr_frzctrl_freeze_req(void);
+void sys_mgr_frzctrl_thaw_req(void);
+
+#endif /* _FREEZE_CONTROLLER_H_ */
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