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| author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2013-04-26 01:34:44 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2013-04-28 11:15:06 +0200 |
| commit | d73b97604bf5f08c547c168af89ae85fbf096762 (patch) | |
| tree | a64f945d02f4736882d02c1766b4163032c7f0c4 /arch/arm/include/asm/arch-mx5 | |
| parent | eec3f0242df7b96a4dc207515050c20ebaddabb2 (diff) | |
| download | blackbird-obmc-uboot-d73b97604bf5f08c547c168af89ae85fbf096762.tar.gz blackbird-obmc-uboot-d73b97604bf5f08c547c168af89ae85fbf096762.zip | |
imx: iomux-v3: Fix common pad control definitions
Commit dc88403 "iomux-v3: Place pad control definitions into common file" broke
mx51_efikamx because it made i.MX6's pad control definitions conflict with
i.MX51's.
i.MX51's pad control definitions are actually common to some other i.MX
(25/35/53), so move them to the common iomux-v3.h (just like what is done in
Linux's), and select the correct definitions depending on whether CONFIG_MX6 is
defined or not.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Diffstat (limited to 'arch/arm/include/asm/arch-mx5')
| -rw-r--r-- | arch/arm/include/asm/arch-mx5/iomux-mx51.h | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/arch/arm/include/asm/arch-mx5/iomux-mx51.h b/arch/arm/include/asm/arch-mx5/iomux-mx51.h index 4f37295994..5f96dc499e 100644 --- a/arch/arm/include/asm/arch-mx5/iomux-mx51.h +++ b/arch/arm/include/asm/arch-mx5/iomux-mx51.h @@ -21,27 +21,6 @@ #include <asm/imx-common/iomux-v3.h> -#define PAD_CTL_DVS (1 << 13) -#define PAD_CTL_INPUT_DDR (1 << 9) -#define PAD_CTL_HYS (1 << 8) - -#define PAD_CTL_PKE (1 << 7) -#define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) -#define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) -#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) -#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) -#define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) - -#define PAD_CTL_ODE (1 << 3) - -#define PAD_CTL_DSE_LOW (0 << 1) -#define PAD_CTL_DSE_MED (1 << 1) -#define PAD_CTL_DSE_HIGH (2 << 1) -#define PAD_CTL_DSE_MAX (3 << 1) - -#define PAD_CTL_SRE_FAST (1 << 0) -#define PAD_CTL_SRE_SLOW (0 << 0) - /* Pad control groupings */ #define MX51_UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_HIGH | \ PAD_CTL_HYS | PAD_CTL_SRE_FAST) @@ -61,8 +40,6 @@ PAD_CTL_SRE_FAST | PAD_CTL_DVS) #define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | PAD_CTL_SRE_FAST) -#define __NA_ 0x000 - /* * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode> * If <padname> or <padmode> refers to a GPIO, it is named GPIO<unit>_<num> |
