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authorStefano Babic <sbabic@denx.de>2012-05-09 12:07:31 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-05-15 08:31:35 +0200
commitc4559daa9158367878ddb3e115d60d41e0322b1f (patch)
tree87a530b33bbd11e5045396dea739d066f29248b4 /arch/arm/include/asm/arch-mx5
parent8f975865be2bb2d5eb2bdb9fc5ab09aae67ad8e1 (diff)
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MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
After an update to the MX51 reference manual (Rev. 5), the values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH are now clearly wrong: "Bit 13: High / Low Output Voltage Range. This bit selects the output voltage mode for SD2_CMD. 0 High output voltage mode 1 Low output voltage mode" The values are currently negated in code - fixed. Reported-by: David Jander <david.jander@protonic.nl> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: David Jander <david.jander@protonic.nl> Acked-by: David Jander <david.jander@protonic.nl> Acked-by: Marek Vasut <marek.vasut@gmail.com>
Diffstat (limited to 'arch/arm/include/asm/arch-mx5')
-rw-r--r--arch/arm/include/asm/arch-mx5/iomux.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-mx5/iomux.h b/arch/arm/include/asm/arch-mx5/iomux.h
index 760371b48f..e3765a37e3 100644
--- a/arch/arm/include/asm/arch-mx5/iomux.h
+++ b/arch/arm/include/asm/arch-mx5/iomux.h
@@ -66,8 +66,8 @@ typedef enum iomux_pad_config {
PAD_CTL_HYS_ENABLE = 0x1 << 8, /* Hysteresis enabled */
PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9,/* DDR input CMOS */
PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,/* DDR input DDR */
- PAD_CTL_DRV_VOT_LOW = 0x0 << 13, /* Low voltage mode */
- PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,/* High voltage mode */
+ PAD_CTL_DRV_VOT_LOW = 0x1 << 13, /* Low voltage mode */
+ PAD_CTL_DRV_VOT_HIGH = 0x0 << 13,/* High voltage mode */
} iomux_pad_config_t;
/* various IOMUX input functions */
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