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author | Tom Rini <trini@konsulko.com> | 2015-12-14 20:27:23 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2015-12-14 20:27:23 -0500 |
commit | e6e3faa5c2da591cd3e0f2047a74cfc832e7b738 (patch) | |
tree | 08c12b0c61cb4edd70df347c61ea36d2088274d3 /arch/arm/include/asm/arch-fsl-layerscape/soc.h | |
parent | 312db9f75f50b339310474d72c8524cef2bd7931 (diff) | |
parent | 989c5f0a8f8694ac92eb0d6cff8745ae8659364f (diff) | |
download | blackbird-obmc-uboot-e6e3faa5c2da591cd3e0f2047a74cfc832e7b738.tar.gz blackbird-obmc-uboot-e6e3faa5c2da591cd3e0f2047a74cfc832e7b738.zip |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/soc.h')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 504c1f9197..1565592996 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -51,6 +51,37 @@ struct cpu_type { #define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E) #define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1)) +/* ahci port register default value */ +#define AHCI_PORT_PHY_1_CFG 0xa003fffe +#define AHCI_PORT_PHY_2_CFG 0x28184d1f +#define AHCI_PORT_PHY_3_CFG 0x0e081509 +#define AHCI_PORT_TRANS_CFG 0x08000029 + +/* AHCI (sata) register map */ +struct ccsr_ahci { + u32 res1[0xa4/4]; /* 0x0 - 0xa4 */ + u32 pcfg; /* port config */ + u32 ppcfg; /* port phy1 config */ + u32 pp2c; /* port phy2 config */ + u32 pp3c; /* port phy3 config */ + u32 pp4c; /* port phy4 config */ + u32 pp5c; /* port phy5 config */ + u32 axicc; /* AXI cache control */ + u32 paxic; /* port AXI config */ + u32 axipc; /* AXI PROT control */ + u32 ptc; /* port Trans Config */ + u32 pts; /* port Trans Status */ + u32 plc; /* port link config */ + u32 plc1; /* port link config1 */ + u32 plc2; /* port link config2 */ + u32 pls; /* port link status */ + u32 pls1; /* port link status1 */ + u32 pcmdc; /* port CMD config */ + u32 ppcs; /* port phy control status */ + u32 pberr; /* port 0/1 BIST error */ + u32 cmds; /* port 0/1 CMD status error */ +}; + #ifdef CONFIG_FSL_LSCH3 void fsl_lsch3_early_init_f(void); #elif defined(CONFIG_FSL_LSCH2) |