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| author | Sudhakar Rajashekhara <sudhakar.raj@ti.com> | 2010-11-18 09:59:37 -0500 |
|---|---|---|
| committer | Sandeep Paulraj <s-paulraj@ti.com> | 2010-11-30 11:27:44 -0500 |
| commit | d26074012b1ae28e4d593fabde389a3dc4471114 (patch) | |
| tree | 7678e3a4733b9943df1b360e9781252a16844027 /arch/arm/include/asm/arch-davinci/hardware.h | |
| parent | 48571ff00526701c88cfcac1294adf20aeeade74 (diff) | |
| download | blackbird-obmc-uboot-d26074012b1ae28e4d593fabde389a3dc4471114.tar.gz blackbird-obmc-uboot-d26074012b1ae28e4d593fabde389a3dc4471114.zip | |
da850: Add RMII support for EMAC
This patch is a port of the work by Sudhakar Rajeshekhara in commit
ab3effbcad8851cc65dc5241a01c064d2030a3b2 of
git://arago-project.org/git/people/sandeep/u-boot-davinci.git.
The da850 UI board has on it an RMII PHY which can be used if the MDC line
to the MII PHY on the baseboard is disabled and the RMII PHY is enabled by
configuring the values of some GPIO pins on the IO expander of the UI board.
This patch implements disabling that line via GPIO2[6], configuring the UI
board's IO expander and setting only the pinmux settings that are needed for
RMII operation.
Tested on da850evm by adding a define for CONFIG_DRIVER_TI_EMAC_USE_RMII.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-davinci/hardware.h')
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/hardware.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index ef616c12a7..b95fa97bac 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -152,6 +152,10 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_BOOTCFG_BASE 0x01c14000 #define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18) +#define GPIO_BANK2_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x38) +#define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c) +#define GPIO_BANK2_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x40) +#define GPIO_BANK2_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x44) #endif /* CONFIG_SOC_DA8XX */ /* Power and Sleep Controller (PSC) Domains */ |
