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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2013-08-19 15:01:22 +0900
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-09-19 08:59:49 +0200
commitaeef2b090d0d982f83dd9a64a22a5e7275dd2939 (patch)
tree17266630578acb0fd485aa610405533a30256c9c /arch/arm/cpu
parent771f74c3d31a265bae103b2b407286ec03a4589b (diff)
downloadblackbird-obmc-uboot-aeef2b090d0d982f83dd9a64a22a5e7275dd2939.tar.gz
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ARM: s3c44b0: remove remainders of dead board
Because commit 5dc5f36 removed B2 board support, arch/arm/cpu/s3c44b0/* and arch/arm/include/asm/arch-s3c44b0/* are not necessary anymore. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Andrea Scian <andrea.scian@dave-tech.it>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/s3c44b0/Makefile34
-rw-r--r--arch/arm/cpu/s3c44b0/cache.c74
-rw-r--r--arch/arm/cpu/s3c44b0/config.mk18
-rw-r--r--arch/arm/cpu/s3c44b0/cpu.c58
-rw-r--r--arch/arm/cpu/s3c44b0/start.S228
-rw-r--r--arch/arm/cpu/s3c44b0/timer.c102
6 files changed, 0 insertions, 514 deletions
diff --git a/arch/arm/cpu/s3c44b0/Makefile b/arch/arm/cpu/s3c44b0/Makefile
deleted file mode 100644
index 39fdbf86c9..0000000000
--- a/arch/arm/cpu/s3c44b0/Makefile
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-
-COBJS += cache.o
-COBJS += cpu.o
-COBJS += timer.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/arch/arm/cpu/s3c44b0/cache.c b/arch/arm/cpu/s3c44b0/cache.c
deleted file mode 100644
index aeee02d85d..0000000000
--- a/arch/arm/cpu/s3c44b0/cache.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * (C) Copyright 2004
- * DAVE Srl
- * http://www.dave-tech.it
- * http://www.wawnet.biz
- * mailto:info@wawnet.biz
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/hardware.h>
-
-static void s3c44b0_flush_cache(void)
-{
- volatile int i;
- /* flush cycle */
- for(i=0x10002000;i<0x10004800;i+=16)
- {
- *((int *)i)=0x0;
- }
-}
-
-void icache_enable (void)
-{
- ulong reg;
-
- s3c44b0_flush_cache();
-
- /*
- Init cache
- Non-cacheable area (everything outside RAM)
- 0x0000:0000 - 0x0C00:0000
- */
- NCACHBE0 = 0xC0000000;
- NCACHBE1 = 0x00000000;
-
- /*
- Enable chache
- */
- reg = SYSCFG;
- reg |= 0x00000006; /* 8kB */
- SYSCFG = reg;
-}
-
-void icache_disable (void)
-{
- ulong reg;
-
- reg = SYSCFG;
- reg &= ~0x00000006; /* 8kB */
- SYSCFG = reg;
-}
-
-int icache_status (void)
-{
- return 0;
-}
-
-void dcache_enable (void)
-{
- icache_enable();
-}
-
-void dcache_disable (void)
-{
- icache_disable();
-}
-
-int dcache_status (void)
-{
- return dcache_status();
-}
diff --git a/arch/arm/cpu/s3c44b0/config.mk b/arch/arm/cpu/s3c44b0/config.mk
deleted file mode 100644
index b902ca36a8..0000000000
--- a/arch/arm/cpu/s3c44b0/config.mk
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# (C) Copyright 2002
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
-PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi -msoft-float
-# =========================================================================
-#
-# Supply options according to compiler version
-#
-# ========================================================================
-PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
-PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
diff --git a/arch/arm/cpu/s3c44b0/cpu.c b/arch/arm/cpu/s3c44b0/cpu.c
deleted file mode 100644
index fa931503a0..0000000000
--- a/arch/arm/cpu/s3c44b0/cpu.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2004
- * DAVE Srl
- * http://www.dave-tech.it
- * http://www.wawnet.biz
- * mailto:info@wawnet.biz
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * S3C44B0 CPU specific code
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/hardware.h>
-
-int arch_cpu_init (void)
-{
- icache_enable();
-
- return 0;
-}
-
-int cleanup_before_linux (void)
-{
- /*
- cache memory should be enabled before calling
- Linux to make the kernel uncompression faster
- */
- icache_enable();
-
- disable_interrupts ();
-
- return 0;
-}
-
-void reset_cpu (ulong addr)
-{
- /*
- reset the cpu using watchdog
- */
-
- /* Disable the watchdog.*/
- WTCON&=~(1<<5);
-
- /* set the timeout value to a short time... */
- WTCNT = 0x1;
-
- /* Enable the watchdog. */
- WTCON|=1;
- WTCON|=(1<<5);
-
- while(1) {
- /*NOP*/
- }
-}
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
deleted file mode 100644
index 6a59592f4c..0000000000
--- a/arch/arm/cpu/s3c44b0/start.S
+++ /dev/null
@@ -1,228 +0,0 @@
-/*
- * Startup Code for S3C44B0 CPU-core
- *
- * (C) Copyright 2004
- * DAVE Srl
- *
- * http://www.dave-tech.it
- * http://www.wawnet.biz
- * mailto:info@wawnet.biz
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <asm-offsets.h>
-#include <config.h>
-#include <version.h>
-
-/*
- * Jump vector table
- */
-
-
-.globl _start
-_start: b reset
- add pc, pc, #0x0c000000
- add pc, pc, #0x0c000000
- add pc, pc, #0x0c000000
- add pc, pc, #0x0c000000
- add pc, pc, #0x0c000000
- add pc, pc, #0x0c000000
- add pc, pc, #0x0c000000
-
- .balignl 16,0xdeadbeef
-
-
-/*
- *************************************************************************
- *
- * Startup Code (reset vector)
- *
- * do important init only if we don't start from memory!
- * relocate u-boot to ram
- * setup stack
- * jump to second stage
- *
- *************************************************************************
- */
-
-.globl _TEXT_BASE
-_TEXT_BASE:
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
- .word CONFIG_SPL_TEXT_BASE
-#else
- .word CONFIG_SYS_TEXT_BASE
-#endif
-
-/*
- * These are defined in the board-specific linker script.
- * Subtracting _start from them lets the linker put their
- * relative position in the executable instead of leaving
- * them null.
- */
-.globl _bss_start_ofs
-_bss_start_ofs:
- .word __bss_start - _start
-
-.globl _bss_end_ofs
-_bss_end_ofs:
- .word __bss_end - _start
-
-.globl _end_ofs
-_end_ofs:
- .word _end - _start
-
-#ifdef CONFIG_USE_IRQ
-/* IRQ stack memory (calculated at run-time) */
-.globl IRQ_STACK_START
-IRQ_STACK_START:
- .word 0x0badc0de
-
-/* IRQ stack memory (calculated at run-time) */
-.globl FIQ_STACK_START
-FIQ_STACK_START:
- .word 0x0badc0de
-#endif
-
-/* IRQ stack memory (calculated at run-time) + 8 bytes */
-.globl IRQ_STACK_START_IN
-IRQ_STACK_START_IN:
- .word 0x0badc0de
-
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
- /*
- * before relocating, we have to setup RAM timing
- * because memory timing is board-dependend, you will
- * find a lowlevel_init.S in your board directory.
- */
- bl lowlevel_init
-#endif
-
- bl _main
-
-/*------------------------------------------------------------------------------*/
-
- .globl c_runtime_cpu_setup
-c_runtime_cpu_setup:
-
- bx lr
-
-/*
- *************************************************************************
- *
- * CPU_init_critical registers
- *
- * setup important registers
- * setup memory timing
- *
- *************************************************************************
- */
-
-#define INTCON (0x01c00000+0x200000)
-#define INTMSK (0x01c00000+0x20000c)
-#define LOCKTIME (0x01c00000+0x18000c)
-#define PLLCON (0x01c00000+0x180000)
-#define CLKCON (0x01c00000+0x180004)
-#define WTCON (0x01c00000+0x130000)
-cpu_init_crit:
- /* disable watch dog */
- ldr r0, =WTCON
- ldr r1, =0x0
- str r1, [r0]
-
- /*
- * mask all IRQs by clearing all bits in the INTMRs
- */
- ldr r1,=INTMSK
- ldr r0, =0x03fffeff
- str r0, [r1]
-
- ldr r1, =INTCON
- ldr r0, =0x05
- str r0, [r1]
-
- /* Set Clock Control Register */
- ldr r1, =LOCKTIME
- ldrb r0, =800
- strb r0, [r1]
-
- ldr r1, =PLLCON
-
-#if CONFIG_S3C44B0_CLOCK_SPEED==66
- ldr r0, =0x34031 /* 66MHz (Quartz=11MHz) */
-#elif CONFIG_S3C44B0_CLOCK_SPEED==75
- ldr r0, =0x610c1 /*B2: Xtal=20mhz Fclk=75MHz */
-#else
-# error CONFIG_S3C44B0_CLOCK_SPEED undefined
-#endif
-
- str r0, [r1]
-
- ldr r1,=CLKCON
- ldr r0, =0x7ff8
- str r0, [r1]
-
- mov pc, lr
-
-
-/*************************************************/
-/* interrupt vectors */
-/*************************************************/
-real_vectors:
- b reset
- b undefined_instruction
- b software_interrupt
- b prefetch_abort
- b data_abort
- b not_used
- b irq
- b fiq
-
-/*************************************************/
-
-undefined_instruction:
- mov r6, #3
- b reset
-
-software_interrupt:
- mov r6, #4
- b reset
-
-prefetch_abort:
- mov r6, #5
- b reset
-
-data_abort:
- mov r6, #6
- b reset
-
-not_used:
- /* we *should* never reach this */
- mov r6, #7
- b reset
-
-irq:
- mov r6, #8
- b reset
-
-fiq:
- mov r6, #9
- b reset
diff --git a/arch/arm/cpu/s3c44b0/timer.c b/arch/arm/cpu/s3c44b0/timer.c
deleted file mode 100644
index f25af7a390..0000000000
--- a/arch/arm/cpu/s3c44b0/timer.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * (C) Copyright 2004
- * DAVE Srl
- * http://www.dave-tech.it
- * http://www.wawnet.biz
- * mailto:info@wawnet.biz
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/hardware.h>
-
-/* we always count down the max. */
-#define TIMER_LOAD_VAL 0xffff
-
-/* macro to read the 16 bit timer */
-#define READ_TIMER (TCNTO1 & 0xffff)
-
-#ifdef CONFIG_USE_IRQ
-#error CONFIG_USE_IRQ NOT supported
-#endif
-
-static ulong timestamp;
-static ulong lastdec;
-
-int timer_init (void)
-{
- TCFG0 = 0x000000E9;
- TCFG1 = 0x00000004;
- TCON = 0x00000900;
- TCNTB1 = TIMER_LOAD_VAL;
- TCMPB1 = 0;
- TCON = 0x00000B00;
- TCON = 0x00000900;
-
-
- lastdec = TCNTB1 = TIMER_LOAD_VAL;
- timestamp = 0;
- return 0;
-}
-
-/*
- * timer without interrupts
- */
-ulong get_timer (ulong base)
-{
- return get_timer_masked () - base;
-}
-
-void __udelay (unsigned long usec)
-{
- ulong tmo;
-
- tmo = usec / 1000;
- tmo *= CONFIG_SYS_HZ;
- tmo /= 8;
-
- tmo += get_timer (0);
-
- while (get_timer_masked () < tmo)
- /*NOP*/;
-}
-
-ulong get_timer_masked (void)
-{
- ulong now = READ_TIMER;
-
- if (lastdec >= now) {
- /* normal mode */
- timestamp += lastdec - now;
- } else {
- /* we have an overflow ... */
- timestamp += lastdec + TIMER_LOAD_VAL - now;
- }
- lastdec = now;
-
- return timestamp;
-}
-
-void udelay_masked (unsigned long usec)
-{
- ulong tmo;
- ulong endtime;
- signed long diff;
-
- if (usec >= 1000) {
- tmo = usec / 1000;
- tmo *= CONFIG_SYS_HZ;
- tmo /= 8;
- } else {
- tmo = usec * CONFIG_SYS_HZ;
- tmo /= (1000*8);
- }
-
- endtime = get_timer(0) + tmo;
-
- do {
- ulong now = get_timer_masked ();
- diff = endtime - now;
- } while (diff >= 0);
-}
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