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| author | Hans de Goede <hdegoede@redhat.com> | 2014-10-22 14:42:48 +0200 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2014-10-24 09:37:24 +0200 |
| commit | 9e54f6ee0148ae26aa673b45aaf77c2782232f48 (patch) | |
| tree | c5ac70e9ce06e622ecf1d78c33f3bc2f24219a75 /arch/arm/cpu/armv7/sunxi | |
| parent | 06beadb0015984da655acbb671aaa5f69ac53c5f (diff) | |
| download | blackbird-obmc-uboot-9e54f6ee0148ae26aa673b45aaf77c2782232f48.tar.gz blackbird-obmc-uboot-9e54f6ee0148ae26aa673b45aaf77c2782232f48.zip | |
sunxi: Add clock_get_pll5p() function
This is a preparation patch for making the pll5 "p" divisor configurable
through Kconfig.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c index ecbdb0162b..4a0d64fb30 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c @@ -180,6 +180,17 @@ void clock_set_pll1(unsigned int hz) } #endif +unsigned int clock_get_pll5p(void) +{ + struct sunxi_ccm_reg *const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + uint32_t rval = readl(&ccm->pll5_cfg); + int n = ((rval & CCM_PLL5_CTRL_N_MASK) >> CCM_PLL5_CTRL_N_SHIFT); + int k = ((rval & CCM_PLL5_CTRL_K_MASK) >> CCM_PLL5_CTRL_K_SHIFT) + 1; + int p = ((rval & CCM_PLL5_CTRL_P_MASK) >> CCM_PLL5_CTRL_P_SHIFT); + return (24000000 * n * k) >> p; +} + unsigned int clock_get_pll6(void) { struct sunxi_ccm_reg *const ccm = |
