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| author | Chen-Yu Tsai <wens@csie.org> | 2014-10-22 16:47:44 +0800 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2014-10-24 09:35:39 +0200 |
| commit | 8ebe4f429266a7cb9011f5b3ab51226297f41210 (patch) | |
| tree | 3e2bfbf2489b2ec2191ec9ae08694109433d1ef0 /arch/arm/cpu/armv7/sunxi | |
| parent | e637b30b9c9f454427e7277eddb6b1f489f3bbc8 (diff) | |
| download | blackbird-obmc-uboot-8ebe4f429266a7cb9011f5b3ab51226297f41210.tar.gz blackbird-obmc-uboot-8ebe4f429266a7cb9011f5b3ab51226297f41210.zip | |
ARM: sunxi: Add basic A23 support
The basic blocks of the A23 are similar to the A31 (sun6i). Re-use
sun6i code for initial clock, gpio, and uart setup.
There is no SPL support for A23, as we do not have any documentation
or sample code for DRAM initialization.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/board.c | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 |
3 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 2a42dcaaa2..24f1daee64 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -12,10 +12,12 @@ obj-y += board.o obj-y += clock.o obj-y += pinmux.o obj-$(CONFIG_SUN6I) += prcm.o +obj-$(CONFIG_SUN8I) += prcm.o obj-$(CONFIG_SUN4I) += clock_sun4i.o obj-$(CONFIG_SUN5I) += clock_sun4i.o obj-$(CONFIG_SUN6I) += clock_sun6i.o obj-$(CONFIG_SUN7I) += clock_sun4i.o +obj-$(CONFIG_SUN8I) += clock_sun6i.o ifndef CONFIG_SPL_BUILD obj-y += cpu_info.o diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 7d10f10fd8..134a19874e 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -110,7 +110,8 @@ void reset_cpu(ulong addr) /* do some early init */ void s_init(void) { -#if !defined CONFIG_SPL_BUILD && (defined CONFIG_SUN7I || defined CONFIG_SUN6I) +#if !defined CONFIG_SPL_BUILD && (defined CONFIG_SUN7I || \ + defined CONFIG_SUN6I || defined CONFIG_SUN8I) /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c b/arch/arm/cpu/armv7/sunxi/cpu_info.c index 40c4e1347c..4f2a09cd2e 100644 --- a/arch/arm/cpu/armv7/sunxi/cpu_info.c +++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c @@ -27,6 +27,8 @@ int print_cpuinfo(void) puts("CPU: Allwinner A31 (SUN6I)\n"); #elif defined CONFIG_SUN7I puts("CPU: Allwinner A20 (SUN7I)\n"); +#elif defined CONFIG_SUN8I + puts("CPU: Allwinner A23 (SUN8I)\n"); #else #warning Please update cpu_info.c with correct CPU information puts("CPU: SUNXI Family\n"); |
