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| author | Hans de Goede <hdegoede@redhat.com> | 2016-03-04 10:57:34 +0100 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2016-03-23 22:04:13 +0100 |
| commit | 583fede8eee8a0e09ff3f057154fc2472032fa25 (patch) | |
| tree | dab8f719ff5c25bf3d3af1d1596efd7bccaae2e0 /arch/arm/cpu/armv7/sunxi | |
| parent | 0764f24ae6bc937e358990c357f7452b4d5351e3 (diff) | |
| download | blackbird-obmc-uboot-583fede8eee8a0e09ff3f057154fc2472032fa25.tar.gz blackbird-obmc-uboot-583fede8eee8a0e09ff3f057154fc2472032fa25.zip | |
sunxi: A23: Fix some revisions needing a different magic sram poke
I've had this one a23 tablet which would not boot and I've finally
figured out what the problem is by looking at the released boot0 code,
it seems the magic sram controller poke which we need to do in s_init()
depends on the revision of the a23.
Specifically this change is needed to get the A23 SoC I have with the
following serial to boot: "E6071AB 26Y7".
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/board.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index eb5f4b686e..e80785ba56 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -113,11 +113,27 @@ int spl_board_load_image(void) void s_init(void) { -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_A23 - /* Magic (undocmented) value taken from boot0, without this DRAM - * access gets messed up (seems cache related) */ + /* + * Undocumented magic taken from boot0, without this DRAM + * access gets messed up (seems cache related). + * The boot0 sources describe this as: "config ema for cache sram" + */ +#if defined CONFIG_MACH_SUN6I setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800); +#elif defined CONFIG_MACH_SUN8I_A23 + uint version; + + /* Unlock sram version info reg, read it, relock */ + setbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15)); + version = readl(SUNXI_SRAMC_BASE + 0x24); + clrbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15)); + + if ((version & 0xffff0000) == 0x16500000) + setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800); + else /* 0x1661 ? */ + setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0xc0); #endif + #if defined CONFIG_MACH_SUN6I || \ defined CONFIG_MACH_SUN7I || \ defined CONFIG_MACH_SUN8I |
