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| author | Siarhei Siamashka <siarhei.siamashka@gmail.com> | 2015-02-16 10:23:59 +0200 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-02-16 20:23:52 +0100 |
| commit | 840fe95c3bcff7692c51b90ebc0d350792597ff0 (patch) | |
| tree | e1356e133b4e7dfb3f583d5ec0031e2483fe6670 /arch/arm/cpu/armv7/start.S | |
| parent | 942cb0b6a29f74507adeb0bce7ff7f23f69faf84 (diff) | |
| download | blackbird-obmc-uboot-840fe95c3bcff7692c51b90ebc0d350792597ff0.tar.gz blackbird-obmc-uboot-840fe95c3bcff7692c51b90ebc0d350792597ff0.zip | |
sunxi: Support the FEL boot mode in the regular u-boot build
So that the CONFIG_SPL_FEL option is not needed anymore. And the regular
SPL binary, generated by the default u-boot build, is now also bootable
over USB in the FEL mode. The SPL still can boot from the SD card too.
A bunch of system registers need to be saved/restored in order to ensure
that the IRQ handler still works in the BROM FEL code after getting
control back from the SPL. This is done in the sunxi code instead of
abusing ifdefs in 'start.S'.
The decision whether to load the main u-boot binary from the SD card or
return to the FEL code in the BROM is done at runtime.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
[hdegoede@redhat.com: Since we now restore various regs before returning to
the FEL BROM code we can drop the sunxi specific #ifdefs in start.S]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/cpu/armv7/start.S')
| -rw-r--r-- | arch/arm/cpu/armv7/start.S | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 098a83ab71..9b49ece2d6 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -54,8 +54,7 @@ save_boot_params_ret: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. * Continue to use ROM code vector only in OMAP4 spl) */ -#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) && \ - !defined(CONFIG_SPL_FEL) +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register bic r0, #CR_V @ V = 0 @@ -68,9 +67,7 @@ save_boot_params_ret: /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT -#ifndef CONFIG_SPL_FEL bl cpu_init_cp15 -#endif bl cpu_init_crit #endif |
