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authorMichael Trimarchi <michael@amarulasolutions.com>2013-11-30 07:59:58 +0100
committerTom Rini <trini@ti.com>2013-12-06 07:02:32 -0500
commitf33b9bd3984fb11e1d8566a866adc5957b1e1c9d (patch)
tree18a16d2db234ce9d75b0cfabe57c86eae3c799aa /arch/arm/cpu/armv7/omap3
parent74007b8519f4cfb4aa0f0af397ca71dde04172bf (diff)
downloadblackbird-obmc-uboot-f33b9bd3984fb11e1d8566a866adc5957b1e1c9d.tar.gz
blackbird-obmc-uboot-f33b9bd3984fb11e1d8566a866adc5957b1e1c9d.zip
arm: omap3: Enable clocks for peripherals only if they are used
This patch change the per_clocks_enable() function used in OMAP3 code to enable peripherals clocks. Only required clock should be activated. So if the board use the uart(x) as a console we need to activate it. The Board's config should include define to enable every subsystem that the board use. For a complete list of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER should be checked. Right now the bootloader can enable and disable clocks for: uart(x) using CONFIG_SYS_NS16550 gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 } i2c bus using CONFIG_DRIVER_OMAP34XX_I2C. Not required gptimer(x) and mcbsp(x) for booting are disabled by default and are not supported by any define. Their activation need to included in the per_clocks_enable if the peripheral is included. Not booting board should enable the peripheral clock connected to their driver Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Diffstat (limited to 'arch/arm/cpu/armv7/omap3')
-rw-r--r--arch/arm/cpu/armv7/omap3/clock.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index 9f989ff860..ae9c4c318f 100644
--- a/arch/arm/cpu/armv7/omap3/clock.c
+++ b/arch/arm/cpu/armv7/omap3/clock.c
@@ -730,8 +730,6 @@ void per_clocks_enable(void)
sr32(&prcm_base->fclken_cam, 0, 32, FCK_CAM_ON);
sr32(&prcm_base->iclken_cam, 0, 32, ICK_CAM_ON);
}
- sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON);
- sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
sdelay(1000);
}
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