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| author | Peng Fan <van.freenix@gmail.com> | 2016-05-23 18:35:54 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-05-24 14:59:56 +0200 |
| commit | b949fd2ccbd1d9877d85e1febdfe2e96b5c150c2 (patch) | |
| tree | 91add3584b1ce02dcf0f3928eca1920dff74f9ec /arch/arm/cpu/armv7/mx6/soc.c | |
| parent | dea572379e267780d7388f1ff28fca79537215c6 (diff) | |
| download | blackbird-obmc-uboot-b949fd2ccbd1d9877d85e1febdfe2e96b5c150c2.tar.gz blackbird-obmc-uboot-b949fd2ccbd1d9877d85e1febdfe2e96b5c150c2.zip | |
imx: mx6: use simpler runtime cpu dection macros
Use simpler runtime cpu dection macros.
i.MX6DL and i.MX6SOLO work the same, so use is_mx6sdl.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6/soc.c')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index aaa1adb446..407f3160fd 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -126,7 +126,7 @@ u32 get_cpu_speed_grade_hz(void) val >>= OCOTP_CFG3_SPEED_SHIFT; val &= 0x3; - if (is_cpu_type(MXC_CPU_MX6UL)) { + if (is_mx6ul()) { if (val == OCOTP_CFG3_SPEED_528MHZ) return 528000000; else if (val == OCOTP_CFG3_SPEED_696MHZ) @@ -138,14 +138,14 @@ u32 get_cpu_speed_grade_hz(void) switch (val) { /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_1P2GHZ: - if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + if (is_mx6dq()) return 1200000000; /* Valid for IMX6SX/IMX6SDL/IMX6DQ */ case OCOTP_CFG3_SPEED_1GHZ: return 996000000; /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_850MHZ: - if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + if (is_mx6dq()) return 852000000; /* Valid for IMX6SX/IMX6SDL/IMX6DQ */ case OCOTP_CFG3_SPEED_800MHZ: @@ -293,7 +293,7 @@ static void clear_mmdc_ch_mask(void) reg = readl(&mxc_ccm->ccdr); /* Clear MMDC channel mask */ - if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) || is_cpu_type(MXC_CPU_MX6SL)) + if (is_mx6sx() || is_mx6ul() || is_mx6sl()) reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK); else reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK | MXC_CCM_CCDR_MMDC_CH0_HS_MASK); @@ -459,8 +459,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) struct fuse_bank4_regs *fuse = (struct fuse_bank4_regs *)bank->fuse_regs; - if ((is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) && - dev_id == 1) { + if ((is_mx6sx() || is_mx6ul()) && dev_id == 1) { u32 value = readl(&fuse->mac_addr2); mac[0] = value >> 24 ; mac[1] = value >> 16 ; @@ -524,7 +523,7 @@ void s_init(void) u32 mask528; u32 reg, periph1, periph2; - if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) + if (is_mx6sx() || is_mx6ul()) return; /* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs |
