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| author | Łukasz Majewski <l.majewski@samsung.com> | 2012-08-07 03:24:03 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:24 +0200 |
| commit | d7957d1d437926b65d0cb774825274caf57f07c7 (patch) | |
| tree | 19dfd7824e70ff2c4bf3f35824db3fe169cd5766 /arch/arm/cpu/armv7/exynos/soc.c | |
| parent | 6fff52b93a1abf3f3fdefd8ccc7dabf6eb4f2ca3 (diff) | |
| download | blackbird-obmc-uboot-d7957d1d437926b65d0cb774825274caf57f07c7.tar.gz blackbird-obmc-uboot-d7957d1d437926b65d0cb774825274caf57f07c7.zip | |
arm:exynos: Enable data cache at exynos based processors.
This patch enables the L1 data cache for systems based on Samsung
Exynos processor.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu/armv7/exynos/soc.c')
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/soc.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/soc.c b/arch/arm/cpu/armv7/exynos/soc.c index dcfcec22dc..ab65b8d3a8 100644 --- a/arch/arm/cpu/armv7/exynos/soc.c +++ b/arch/arm/cpu/armv7/exynos/soc.c @@ -28,3 +28,11 @@ void reset_cpu(ulong addr) { writel(0x1, samsung_get_base_swreset()); } + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif |
