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authorKishon Vijay Abraham I <kishon@ti.com>2015-02-23 18:39:45 +0530
committerMarek Vasut <marex@denx.de>2015-04-14 05:48:08 +0200
commitfc2f15d2f7134c0de2bd0a16310bdd68da78563b (patch)
tree5f1a4ec1dd9000feb74be92c043e79d46193cc53 /arch/arm/cpu/armv7/am33xx
parentd3cfcb3e2cf44ab7493c9ca0b7a6368bdf3df2d0 (diff)
downloadblackbird-obmc-uboot-fc2f15d2f7134c0de2bd0a16310bdd68da78563b.tar.gz
blackbird-obmc-uboot-fc2f15d2f7134c0de2bd0a16310bdd68da78563b.zip
ARM: AM43xx: Enable clocks for USB OTGSS and USB PHY
Enabled clocks for dwc3 controller and USB PHY present in AM43xx. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx')
-rw-r--r--arch/arm/cpu/armv7/am33xx/clock_am43xx.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
index 529a119514..b1c0025eeb 100644
--- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
@@ -111,9 +111,21 @@ void enable_basic_clocks(void)
&cmper->emifclkctrl,
&cmper->otfaemifclkctrl,
&cmper->qspiclkctrl,
+ &cmper->usb0clkctrl,
+ &cmper->usbphyocp2scp0clkctrl,
+ &cmper->usb1clkctrl,
+ &cmper->usbphyocp2scp1clkctrl,
0
};
+ setbits_le32(&cmper->usb0clkctrl,
+ USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960);
+ setbits_le32(&cmwkup->usbphy0clkctrl,
+ USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K);
+ setbits_le32(&cmper->usb1clkctrl,
+ USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960);
+ setbits_le32(&cmwkup->usbphy1clkctrl,
+ USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K);
do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);
/* Select the Master osc clk as Timer2 clock source */
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