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| author | Christian Riesch <christian.riesch@omicron.at> | 2012-02-02 00:44:37 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-12 10:11:33 +0100 |
| commit | 27b66622b51f350ce6c143f82d104860ee887f5c (patch) | |
| tree | f4747f95622b6d7809baf4ee8bebdd8a6c56d9b4 /arch/arm/cpu/arm926ejs/start.S | |
| parent | eb93524224d269e4e4124429e91757cab4ee27e6 (diff) | |
| download | blackbird-obmc-uboot-27b66622b51f350ce6c143f82d104860ee887f5c.tar.gz blackbird-obmc-uboot-27b66622b51f350ce6c143f82d104860ee887f5c.zip | |
arm, arm926ejs: Do cpu critical inits only for boards that require it
This patch reverts commit ca4b55800ed74207c35271bf7335a092d4955416
"arm, arm926ejs: always do cpu critical inits" since it impacts all
arm926ejs based configurations and caused problems, e.g., with
the hawkboard.
Instead the patch removes the CONFIG_SKIP_LOWLEVEL_INIT defines
from the board configurations that need low level initialization.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/start.S')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/start.S | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 6a09c028e4..bb4d00bf3f 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -194,7 +194,9 @@ reset: * we do sys-critical inits only at reboot, * not when booting from ram! */ +#ifndef CONFIG_SKIP_LOWLEVEL_INIT bl cpu_init_crit +#endif /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: @@ -353,6 +355,7 @@ _dynsym_start_ofs: * ************************************************************************* */ +#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: /* * flush v4 I/D caches @@ -371,15 +374,14 @@ cpu_init_crit: orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ mcr p15, 0, r0, c1, c0, 0 -#ifndef CONFIG_SKIP_LOWLEVEL_INIT /* * Go setup Memory and board specific bits prior to relocation. */ mov ip, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ mov pc, lr /* back to my caller */ +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #ifndef CONFIG_SPL_BUILD /* |
