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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2011-08-04 08:53:29 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-09-03 22:40:44 +0200
commit58fb6020c15580365e441ab3a7b8cc6aa787269d (patch)
tree9ec78609a078a789e1912d0ceaeb5cb52002f4d4 /arch/arm/cpu/arm926ejs/at91
parentf47316a8ba3e83e136be33a7610cbdd0a8ca7990 (diff)
downloadblackbird-obmc-uboot-58fb6020c15580365e441ab3a7b8cc6aa787269d.tar.gz
blackbird-obmc-uboot-58fb6020c15580365e441ab3a7b8cc6aa787269d.zip
atmel: update at91sam9m10g45 SoC support to new style
Based on earlier work by Alex Waterman <awaterman@dawning.com>. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/at91')
-rw-r--r--arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c114
1 files changed, 55 insertions, 59 deletions
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
index 4ad9b1fcc9..5ff32e3749 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
@@ -26,135 +26,131 @@
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
+#include <asm/io.h>
+
+/*
+ * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
+ * peripheral pins. Good to have if hardware is soldered optionally
+ * or in case of SPI no slave is selected. Avoid lines to float
+ * needlessly. Use a short local PUP define.
+ *
+ * Due to errata "TXD floats when CTS is inactive" pullups are always
+ * on for TXD pins.
+ */
+#ifdef CONFIG_AT91_GPIO_PULLUP
+# define PUP CONFIG_AT91_GPIO_PULLUP
+#else
+# define PUP 0
+#endif
void at91_serial0_hw_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 19, 1); /* TXD0 */
- at91_set_a_periph(AT91_PIO_PORTB, 18, 0); /* RXD0 */
- writel(1 << AT91SAM9G45_ID_US0, &pmc->pcer);
+ at91_set_a_periph(AT91_PIO_PORTB, 18, PUP); /* RXD0 */
+ writel(1 << ATMEL_ID_USART0, &pmc->pcer);
}
void at91_serial1_hw_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD1 */
- at91_set_a_periph(AT91_PIO_PORTB, 5, 0); /* RXD1 */
- writel(1 << AT91SAM9G45_ID_US1, &pmc->pcer);
+ at91_set_a_periph(AT91_PIO_PORTB, 5, PUP); /* RXD1 */
+ writel(1 << ATMEL_ID_USART1, &pmc->pcer);
}
void at91_serial2_hw_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTD, 6, 1); /* TXD2 */
- at91_set_a_periph(AT91_PIO_PORTD, 7, 0); /* RXD2 */
- writel(1 << AT91SAM9G45_ID_US2, &pmc->pcer);
+ at91_set_a_periph(AT91_PIO_PORTD, 7, PUP); /* RXD2 */
+ writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
-void at91_serial3_hw_init(void)
+void at91_seriald_hw_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTB, 13, 1); /* DTXD */
- writel(1 << AT91_ID_SYS, &pmc->pcer);
-}
-
-void at91_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
- at91_serial0_hw_init();
-#endif
-
-#ifdef CONFIG_USART1
- at91_serial1_hw_init();
-#endif
-
-#ifdef CONFIG_USART2
- at91_serial2_hw_init();
-#endif
-
-#ifdef CONFIG_USART3 /* DBGU */
- at91_serial3_hw_init();
-#endif
+ writel(1 << ATMEL_ID_SYS, &pmc->pcer);
}
-#ifdef CONFIG_ATMEL_SPI
+#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
void at91_spi0_hw_init(unsigned long cs_mask)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* SPI0_MISO */
- at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* SPI0_MOSI */
- at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* SPI0_SPCK */
+ at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI0_MISO */
+ at91_set_a_periph(AT91_PIO_PORTB, 1, PUP); /* SPI0_MOSI */
+ at91_set_a_periph(AT91_PIO_PORTB, 2, PUP); /* SPI0_SPCK */
/* Enable clock */
- writel(1 << AT91SAM9G45_ID_SPI0, &pmc->pcer);
+ writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
if (cs_mask & (1 << 0)) {
- at91_set_a_periph(AT91_PIO_PORTB, 3, 0);
+ at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_b_periph(AT91_PIO_PORTB, 18, 0);
+ at91_set_b_periph(AT91_PIO_PORTB, 18, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_b_periph(AT91_PIO_PORTB, 19, 0);
+ at91_set_b_periph(AT91_PIO_PORTB, 19, 1);
}
if (cs_mask & (1 << 3)) {
- at91_set_b_periph(AT91_PIO_PORTD, 27, 0);
+ at91_set_b_periph(AT91_PIO_PORTD, 27, 1);
}
if (cs_mask & (1 << 4)) {
- at91_set_pio_output(AT91_PIO_PORTB, 3, 0);
+ at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
}
if (cs_mask & (1 << 5)) {
- at91_set_pio_output(AT91_PIO_PORTB, 18, 0);
+ at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
}
if (cs_mask & (1 << 6)) {
- at91_set_pio_output(AT91_PIO_PORTB, 19, 0);
+ at91_set_pio_output(AT91_PIO_PORTB, 19, 1);
}
if (cs_mask & (1 << 7)) {
- at91_set_pio_output(AT91_PIO_PORTD, 27, 0);
+ at91_set_pio_output(AT91_PIO_PORTD, 27, 1);
}
}
void at91_spi1_hw_init(unsigned long cs_mask)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_MISO */
- at91_set_a_periph(AT91_PIO_PORTB, 15, 0); /* SPI1_MOSI */
- at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* SPI1_SPCK */
+ at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_MISO */
+ at91_set_a_periph(AT91_PIO_PORTB, 15, PUP); /* SPI1_MOSI */
+ at91_set_a_periph(AT91_PIO_PORTB, 16, PUP); /* SPI1_SPCK */
/* Enable clock */
- writel(1 << AT91SAM9G45_ID_SPI1, &pmc->pcer);
+ writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
if (cs_mask & (1 << 0)) {
- at91_set_a_periph(AT91_PIO_PORTB, 17, 0);
+ at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_b_periph(AT91_PIO_PORTD, 28, 0);
+ at91_set_b_periph(AT91_PIO_PORTD, 28, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_a_periph(AT91_PIO_PORTD, 18, 0);
+ at91_set_a_periph(AT91_PIO_PORTD, 18, 1);
}
if (cs_mask & (1 << 3)) {
- at91_set_a_periph(AT91_PIO_PORTD, 19, 0);
+ at91_set_a_periph(AT91_PIO_PORTD, 19, 1);
}
if (cs_mask & (1 << 4)) {
- at91_set_pio_output(AT91_PIO_PORTB, 17, 0);
+ at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
}
if (cs_mask & (1 << 5)) {
- at91_set_pio_output(AT91_PIO_PORTD, 28, 0);
+ at91_set_pio_output(AT91_PIO_PORTD, 28, 1);
}
if (cs_mask & (1 << 6)) {
- at91_set_pio_output(AT91_PIO_PORTD, 18, 0);
+ at91_set_pio_output(AT91_PIO_PORTD, 18, 1);
}
if (cs_mask & (1 << 7)) {
- at91_set_pio_output(AT91_PIO_PORTD, 19, 0);
+ at91_set_pio_output(AT91_PIO_PORTD, 19, 1);
}
}
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