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| author | Stefan Roese <sr@denx.de> | 2005-12-15 09:43:12 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2005-12-15 09:43:12 +0100 |
| commit | 81a3170b150cbcafc9a59c080f0e759f6a2a5ce5 (patch) | |
| tree | c27b79400ea3f723ce6902fe426c33e8cdd318f9 /CHANGELOG | |
| parent | e43232dee85d17dff4fad7fc8ff2bc5f6b9c7a76 (diff) | |
| download | blackbird-obmc-uboot-81a3170b150cbcafc9a59c080f0e759f6a2a5ce5.tar.gz blackbird-obmc-uboot-81a3170b150cbcafc9a59c080f0e759f6a2a5ce5.zip | |
Changes to Yellowstone & Yosemite 440EP/GR eval boards:
- Changed GPIO setup to enable another address line in order to
address 64M of FLASH.
- Added function sdram_tr1_set to auto calculate the tr1 value for
the DDR.
Patch by Steven Blakeslee, 12 Dec 2005
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 7 |
1 files changed, 7 insertions, 0 deletions
@@ -2,6 +2,13 @@ Changes for U-Boot 1.1.4: ====================================================================== +* Changes to Yellowstone & Yosemite 440EP/GR eval boards: + - Changed GPIO setup to enable another address line in order to + address 64M of FLASH. + - Added function sdram_tr1_set to auto calculate the tr1 value for + the DDR. + Patch by Steven Blakeslee, 12 Dec 2005 + * Change port configuration for O2DNT (CODEC1 on PSC1). * Fix register for PCI async mode on PPC440EP |
