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| author | Stefano Babic <sbabic@denx.de> | 2016-05-17 17:51:44 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-05-17 17:51:44 +0200 |
| commit | 52b1eaf93d6b55e1467f97b8eefdc2f8b6031c43 (patch) | |
| tree | 73357539a8382b406c29b1826dc17012f267f2cb | |
| parent | aaeadd3f7b248aeb1c72c36183ab9c6e77da6ce2 (diff) | |
| parent | aeaec0e682f45b9e0c62c522fafea353931f73ed (diff) | |
| download | blackbird-obmc-uboot-52b1eaf93d6b55e1467f97b8eefdc2f8b6031c43.tar.gz blackbird-obmc-uboot-52b1eaf93d6b55e1467f97b8eefdc2f8b6031c43.zip | |
Merge branch 'master' of git://git.denx.de/u-boot
162 files changed, 720 insertions, 703 deletions
@@ -10,6 +10,7 @@ Allen Martin <amartin@nvidia.com> Andreas Bießmann <andreas.devel@googlemail.com> +Andreas Bießmann <andreas@biessmann.org> Aneesh V <aneesh@ti.com> Dirk Behme <dirk.behme@googlemail.com> Fabio Estevam <fabio.estevam@nxp.com> diff --git a/MAINTAINERS b/MAINTAINERS index 27eb8e59b3..1db8243482 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -73,7 +73,7 @@ F: arch/arm/cpu/armv7/socfpga/ F: board/altera/socfpga/ ARM ATMEL AT91 -M: Andreas Bießmann <andreas.devel@googlemail.com> +M: Andreas Bießmann <andreas@biessmann.org> S: Maintained T: git git://git.denx.de/u-boot-atmel.git F: arch/arm/mach-at91/ @@ -206,7 +206,7 @@ F: arch/arm/cpu/armv8/zynqmp/ F: arch/arm/include/asm/arch-zynqmp/ AVR32 -M: Andreas Bießmann <andreas.devel@googlemail.com> +M: Andreas Bießmann <andreas@biessmann.org> S: Maintained T: git git://git.denx.de/u-boot-avr32.git F: arch/avr32/ @@ -5,7 +5,7 @@ VERSION = 2016 PATCHLEVEL = 05 SUBLEVEL = -EXTRAVERSION = -rc3 +EXTRAVERSION = NAME = # *DOCUMENTATION* @@ -898,7 +898,7 @@ ifdef CONFIG_SPL_LOAD_FIT MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \ - -b $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) + $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) else MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 595c951ed2..9b9b78eddd 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -237,4 +237,5 @@ void prcm_init() enable_basic_clocks(); scale_vcores(); setup_dplls(); + timer_init(); } diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c index ed9ba7b5d3..0456263d6e 100644 --- a/arch/arm/cpu/armv7/omap-common/boot-common.c +++ b/arch/arm/cpu/armv7/omap-common/boot-common.c @@ -111,6 +111,8 @@ void save_omap_boot_params(void) (boot_device <= MMC_BOOT_DEVICES_END)) { switch (boot_device) { case BOOT_DEVICE_MMC1: + boot_mode = MMCSD_MODE_FS; + break; case BOOT_DEVICE_MMC2: boot_mode = MMCSD_MODE_RAW; break; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c index d580a43b41..a9b12a43ad 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c @@ -180,7 +180,7 @@ ulong get_ddr_freq(ulong ctrl_num) /* * DDR controller 0 & 1 are on memory complex 0 - * DDR controler 2 is on memory complext 1 + * DDR controller 2 is on memory complext 1 */ #ifdef CONFIG_SYS_FSL_HAS_DP_DDR if (ctrl_num >= 2) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index deb44a895f..c3cc8199ca 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -214,7 +214,9 @@ WEAK(lowlevel_init) ldr x1, =GICC_BASE bl gic_init_secure_percpu #endif +#endif +#ifndef CONFIG_ARMV8_MULTIENTRY branch_if_master x0, x1, 2f /* diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index d2ab3b3669..bdd93248fb 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -83,5 +83,6 @@ }; &usb1 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index c208628f35..d34a784eec 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -68,7 +68,7 @@ SPL: spl/u-boot-spl.bin $(IMX_CONFIG) FORCE $(call if_changed,mkimage) MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \ - -e $(CONFIG_SYS_TEXT_BASE) -C none + -e $(CONFIG_SYS_TEXT_BASE) -C none -T firmware u-boot.uim: u-boot.bin FORCE $(call if_changed,mkimage) diff --git a/arch/arm/imx-common/cache.c b/arch/arm/imx-common/cache.c index 54b021cfed..b77548821d 100644 --- a/arch/arm/imx-common/cache.c +++ b/arch/arm/imx-common/cache.c @@ -43,6 +43,12 @@ void v7_outer_cache_enable(void) /* + * Must disable the L2 before changing the latency parameters + * and auxiliary control register. + */ + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); + + /* * Set bit 22 in the auxiliary control register. If this bit * is cleared, PL310 treats Normal Shared Non-cacheable * accesses as Cacheable no-allocate. @@ -59,9 +65,6 @@ void v7_outer_cache_enable(void) } #endif - /* Must disable the L2 before changing the latency parameters */ - clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); - writel(0x132, &pl310->pl310_tag_latency_ctrl); writel(0x132, &pl310->pl310_data_latency_ctrl); diff --git a/arch/arm/include/asm/arch-tegra/gpu.h b/arch/arm/include/asm/arch-tegra/gpu.h index 4423386f28..6be9f6157b 100644 --- a/arch/arm/include/asm/arch-tegra/gpu.h +++ b/arch/arm/include/asm/arch-tegra/gpu.h @@ -26,7 +26,7 @@ int tegra_gpu_enable_node(void *blob, const char *gpupath); #else /* CONFIG_OF_LIBFDT */ -static inline int tegra_gpu_enable_node(void *blob, const char *gpupath) +static inline int tegra_gpu_enable_node(void *blob, const char *compat) { return 0; } diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h index 30e7939d8e..423fc70111 100644 --- a/arch/arm/include/asm/armv7.h +++ b/arch/arm/include/asm/armv7.h @@ -59,26 +59,7 @@ #ifndef __ASSEMBLY__ #include <linux/types.h> #include <asm/io.h> - -/* - * CP15 Barrier instructions - * Please note that we have separate barrier instructions in ARMv7 - * However, we use the CP15 based instructtions because we use - * -march=armv5 in U-Boot - */ -#define CP15ISB asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0)) -#define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)) -#define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0)) - -#ifdef __ARM_ARCH_7A__ -#define ISB asm volatile ("isb" : : : "memory") -#define DSB asm volatile ("dsb" : : : "memory") -#define DMB asm volatile ("dmb" : : : "memory") -#else -#define ISB CP15ISB -#define DSB CP15DSB -#define DMB CP15DMB -#endif +#include <asm/barriers.h> /* * Workaround for ARM errata # 798870 diff --git a/arch/arm/include/asm/barriers.h b/arch/arm/include/asm/barriers.h new file mode 100644 index 0000000000..37870f9d71 --- /dev/null +++ b/arch/arm/include/asm/barriers.h @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2016 ARM Ltd. + * + * ARM and ARM64 barrier instructions + * split from armv7.h to allow sharing between ARM and ARM64 + * + * Original copyright in armv7.h was: + * (C) Copyright 2010 Texas Instruments, <www.ti.com> Aneesh V <aneesh@ti.com> + * + * Much of the original barrier code was contributed by: + * Valentine Barshak <valentine.barshak@cogentembedded.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __BARRIERS_H__ +#define __BARRIERS_H__ + +#ifndef __ASSEMBLY__ + +#ifndef CONFIG_ARM64 +/* + * CP15 Barrier instructions + * Please note that we have separate barrier instructions in ARMv7 + * However, we use the CP15 based instructtions because we use + * -march=armv5 in U-Boot + */ +#define CP15ISB asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0)) +#define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)) +#define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0)) + +#endif /* !CONFIG_ARM64 */ + +#if defined(__ARM_ARCH_7A__) || defined(CONFIG_ARM64) +#define ISB asm volatile ("isb sy" : : : "memory") +#define DSB asm volatile ("dsb sy" : : : "memory") +#define DMB asm volatile ("dmb sy" : : : "memory") +#else +#define ISB CP15ISB +#define DSB CP15DSB +#define DMB CP15DMB +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BARRIERS_H__ */ diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c index cf10a53ec6..4614d2657c 100644 --- a/arch/arm/lib/stack.c +++ b/arch/arm/lib/stack.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015 Andreas Bießmann <andreas.devel@googlemail.com> + * Copyright (c) 2015 Andreas Bießmann <andreas@biessmann.org> * * Copyright (c) 2011 The Chromium OS Authors. * (C) Copyright 2002-2006 diff --git a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c index 9b9800ad9a..f139b9167d 100644 --- a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c +++ b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c @@ -2,7 +2,7 @@ * [partely copied from arch/arm/cpu/arm926ejs/at91/arm9260_devices.c] * * (C) Copyright 2011 - * Andreas Bießmann <andreas.devel@googlemail.com> + * Andreas Bießmann <andreas@biessmann.org> * * (C) Copyright 2007-2008 * Stelian Pop <stelian@popies.net> diff --git a/arch/arm/mach-at91/arm920t/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c index b0f411b1c3..926d1c9fe8 100644 --- a/arch/arm/mach-at91/arm920t/cpu.c +++ b/arch/arm/mach-at91/arm920t/cpu.c @@ -2,7 +2,7 @@ * [origin: arch/arm/cpu/arm926ejs/at91/cpu.c] * * (C) Copyright 2011 - * Andreas Bießmann, andreas.devel@googlemail.com + * Andreas Bießmann, andreas@biessmann.org * (C) Copyright 2010 * Reinhard Meyer, reinhard.meyer@emk-elektronik.de * (C) Copyright 2009 diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c index 71330cb26d..2e21282335 100644 --- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c @@ -561,14 +561,14 @@ static void dram_all_config(const struct dram_info *dram, &sdram_params->ch[chan]; sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); - sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan); + sys_reg |= chan << SYS_REG_CHINFO_SHIFT(chan); sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan); sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan); - sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan); + sys_reg |= info->bk == 3 ? 1 << SYS_REG_BK_SHIFT(chan) : 0; sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan); sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan); - sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(chan); - sys_reg |= (2 >>info->dbw) << SYS_REG_DBW_SHIFT(chan); + sys_reg |= info->bw << SYS_REG_BW_SHIFT(chan); + sys_reg |= info->dbw << SYS_REG_DBW_SHIFT(chan); dram_cfg_rbc(&dram->chan[chan], chan, sdram_params); } @@ -720,13 +720,13 @@ size_t sdram_size_mb(struct rk3288_pmu *pmu) rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) & SYS_REG_RANK_MASK); col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK); - bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK) ; + bk = sys_reg & (1 << SYS_REG_BK_SHIFT(ch)) ? 3 : 0; cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) & SYS_REG_CS0_ROW_MASK); cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) & SYS_REG_CS1_ROW_MASK); - bw = (2 >> (sys_reg >> SYS_REG_BW_SHIFT(ch)) & - SYS_REG_BW_MASK); + bw = (sys_reg >> SYS_REG_BW_SHIFT(ch)) & + SYS_REG_BW_MASK; row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) & SYS_REG_ROW_3_4_MASK; diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index dd05e14c05..5cbd8a4325 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -172,7 +172,7 @@ static int socfpga_eth_reset(void) #else static int socfpga_eth_reset(void) { - return 0 + return 0; }; #endif diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c index 50318d2eb6..20b430f859 100644 --- a/arch/arm/mach-sunxi/dram_helpers.c +++ b/arch/arm/mach-sunxi/dram_helpers.c @@ -7,6 +7,7 @@ */ #include <common.h> +#include <asm/barriers.h> #include <asm/io.h> #include <asm/arch/dram.h> @@ -31,6 +32,7 @@ bool mctl_mem_matches(u32 offset) /* Try to write different values to RAM at two addresses */ writel(0, CONFIG_SYS_SDRAM_BASE); writel(0xaa55aa55, (ulong)CONFIG_SYS_SDRAM_BASE + offset); + DSB; /* Check if the same value is actually observed when reading back */ return readl(CONFIG_SYS_SDRAM_BASE) == readl((ulong)CONFIG_SYS_SDRAM_BASE + offset); diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index ac274e17e8..141d6e1cb5 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -404,16 +404,22 @@ ulong board_get_usable_ram_top(ulong total_size) */ int ft_system_setup(void *blob, bd_t *bd) { - const char *gpu_path = -#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210) - "/gpu@0,57000000"; -#else - NULL; + const char *gpu_compats[] = { +#if defined(CONFIG_TEGRA124) + "nvidia,gk20a", +#endif +#if defined(CONFIG_TEGRA210) + "nvidia,gm20b", #endif + }; + int i, ret; /* Enable GPU node if GPU setup has been performed */ - if (gpu_path != NULL) - return tegra_gpu_enable_node(blob, gpu_path); + for (i = 0; i < ARRAY_SIZE(gpu_compats); i++) { + ret = tegra_gpu_enable_node(blob, gpu_compats[i]); + if (ret) + return ret; + } return 0; } diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c index 0dbddd45d4..74b64a620c 100644 --- a/arch/arm/mach-tegra/gpu.c +++ b/arch/arm/mach-tegra/gpu.c @@ -33,16 +33,17 @@ void tegra_gpu_config(void) #if defined(CONFIG_OF_LIBFDT) -int tegra_gpu_enable_node(void *blob, const char *gpupath) +int tegra_gpu_enable_node(void *blob, const char *compat) { int offset; - if (_configured) { - offset = fdt_path_offset(blob, gpupath); - if (offset > 0) { - fdt_status_okay(blob, offset); - debug("enabled GPU node %s\n", gpupath); - } + if (!_configured) + return 0; + + offset = fdt_node_offset_by_compatible(blob, -1, compat); + while (offset != -FDT_ERR_NOTFOUND) { + fdt_status_okay(blob, offset); + offset = fdt_node_offset_by_compatible(blob, offset, compat); } return 0; diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c index 100275e6cb..b092c1bde8 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c @@ -43,7 +43,7 @@ static struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"}, {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"}, {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"}, - {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NOR, "NOR Boot (XECS1)"}, }; static int get_boot_mode_sel(void) diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index 48e478c5d1..b180f44ce8 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -114,7 +114,7 @@ static int do_mmcsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) U_BOOT_CMD( mmcsetn, 1, 1, do_mmcsetn, - "Set the first MMC (not SD) dev number to \"mmc_first_dev\" enviroment", + "Set the first MMC (not SD) dev number to \"mmc_first_dev\" environment", "" ); #endif diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ld20.c b/arch/arm/mach-uniphier/early-clk/early-clk-ld20.c index 37adb37a1f..5201a55940 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-ld20.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-ld20.c @@ -21,6 +21,10 @@ int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd) writel(tmp, SC_RSTCTRL7); /* provide clocks */ + tmp = readl(SC_CLKCTRL4); + tmp |= SC_CLKCTRL4_PERI; + writel(tmp, SC_CLKCTRL4); + tmp = readl(SC_CLKCTRL7); tmp |= SC_CLKCTRL7_UMCSB | SC_CLKCTRL7_UMC32 | SC_CLKCTRL7_UMC31 | SC_CLKCTRL7_UMC30; diff --git a/arch/arm/mach-uniphier/early-pinctrl/Makefile b/arch/arm/mach-uniphier/early-pinctrl/Makefile index dc4064c05b..a1039025ca 100644 --- a/arch/arm/mach-uniphier/early-pinctrl/Makefile +++ b/arch/arm/mach-uniphier/early-pinctrl/Makefile @@ -3,3 +3,4 @@ # obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-pinctrl-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-pinctrl-ld20.o diff --git a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c new file mode 100644 index 0000000000..537deaf232 --- /dev/null +++ b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "../init.h" +#include "../sg-regs.h" + +int uniphier_ld20_early_pin_init(const struct uniphier_board_data *bd) +{ + /* Comment format: PAD Name -> Function Name */ + sg_set_pinsel(0, 0, 8, 4); /* XECS1 -> XECS1 */ + sg_set_pinsel(1, 0, 8, 4); /* ERXW -> ERXW */ + sg_set_pinsel(2, 0, 8, 4); /* XERWE1 -> XERWE1 */ + sg_set_pinsel(6, 2, 8, 4); /* XNFRE -> XERWE0 */ + sg_set_pinsel(7, 2, 8, 4); /* XNFWE -> ES0 */ + sg_set_pinsel(8, 2, 8, 4); /* NFALE -> ES1 */ + sg_set_pinsel(9, 2, 8, 4); /* NFCLE -> ES2 */ + sg_set_pinsel(10, 2, 8, 4); /* NFD0 -> ED0 */ + sg_set_pinsel(11, 2, 8, 4); /* NFD1 -> ED1 */ + sg_set_pinsel(12, 2, 8, 4); /* NFD2 -> ED2 */ + sg_set_pinsel(13, 2, 8, 4); /* NFD3 -> ED3 */ + sg_set_pinsel(14, 2, 8, 4); /* NFD4 -> ED4 */ + sg_set_pinsel(15, 2, 8, 4); /* NFD5 -> ED5 */ + sg_set_pinsel(16, 2, 8, 4); /* NFD6 -> ED6 */ + sg_set_pinsel(17, 2, 8, 4); /* NFD7 -> ED7 */ + sg_set_iectrl_range(0, 2); + sg_set_iectrl_range(6, 17); + + return 0; +} diff --git a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c index 22c07fbfe1..6c5d58f856 100644 --- a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c +++ b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c @@ -22,5 +22,7 @@ int uniphier_sld3_early_pin_init(const struct uniphier_board_data *bd) sg_set_pinsel(102, 2, 4, 4); /* TXD2 */ #endif + sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */ + return 0; } diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index f5b3fa836c..ab0a68d83d 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -37,7 +37,6 @@ int uniphier_ld20_init(const struct uniphier_board_data *bd); #if defined(CONFIG_MICRO_SUPPORT_CARD) int uniphier_sbc_init_admulti(const struct uniphier_board_data *bd); int uniphier_sbc_init_savepin(const struct uniphier_board_data *bd); -int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd); int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd); int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd); #else @@ -53,11 +52,6 @@ static inline int uniphier_sbc_init_savepin( return 0; } -static inline int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd) -{ - return 0; -} - static inline int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd) { return 0; @@ -90,6 +84,7 @@ int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd); int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd); int uniphier_sld3_early_pin_init(const struct uniphier_board_data *bd); +int uniphier_ld20_early_pin_init(const struct uniphier_board_data *bd); int uniphier_ld4_umc_init(const struct uniphier_board_data *bd); int uniphier_pro4_umc_init(const struct uniphier_board_data *bd); diff --git a/arch/arm/mach-uniphier/init/init-ld20.c b/arch/arm/mach-uniphier/init/init-ld20.c index 0ad264c9f1..660ad457dc 100644 --- a/arch/arm/mach-uniphier/init/init-ld20.c +++ b/arch/arm/mach-uniphier/init/init-ld20.c @@ -13,6 +13,8 @@ int uniphier_ld20_init(const struct uniphier_board_data *bd) { uniphier_sbc_init_savepin(bd); + uniphier_pxs2_sbc_init(bd); + uniphier_ld20_early_pin_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-sld3.c b/arch/arm/mach-uniphier/init/init-sld3.c index 473e0c8831..50fcbb09b8 100644 --- a/arch/arm/mach-uniphier/init/init-sld3.c +++ b/arch/arm/mach-uniphier/init/init-sld3.c @@ -15,7 +15,8 @@ int uniphier_sld3_init(const struct uniphier_board_data *bd) uniphier_sld3_bcu_init(bd); uniphier_sbc_init_admulti(bd); - uniphier_sld3_sbc_init(bd); + + uniphier_sld3_early_pin_init(bd); support_card_reset(); @@ -34,8 +35,6 @@ int uniphier_sld3_init(const struct uniphier_board_data *bd) led_puts("L2"); - uniphier_sld3_early_pin_init(bd); - led_puts("L3"); #ifdef CONFIG_SPL_SERIAL_SUPPORT diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile index 3c1e92a54d..38da253975 100644 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -2,11 +2,11 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += sbc-admulti.o sbc-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += sbc-admulti.o obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-savepin.o sbc-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += sbc-savepin.o obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-savepin.o sbc-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += sbc-savepin.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-savepin.o sbc-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-savepin.o sbc-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-savepin.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-savepin.o sbc-pxs2.o diff --git a/arch/arm/mach-uniphier/sbc/sbc-sld3.c b/arch/arm/mach-uniphier/sbc/sbc-sld3.c deleted file mode 100644 index ac9d0301be..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc-sld3.c +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <linux/io.h> - -#include "../init.h" -#include "../sg-regs.h" - -int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd) -{ - sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */ - - return 0; -} diff --git a/arch/avr32/cpu/mmc.c b/arch/avr32/cpu/mmc.c index b7213e4e7a..26ba3a24e4 100644 --- a/arch/avr32/cpu/mmc.c +++ b/arch/avr32/cpu/mmc.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2004-2006 Atmel Corporation - * Copyright (C) 2015 Andreas Bießmann <andreas.devel@googlmail.com> + * Copyright (C) 2015 Andreas Bießmann <andreas@biessmann.org> * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c index 1c26f1b36a..342b9e2c1c 100644 --- a/arch/avr32/lib/bootm.c +++ b/arch/avr32/lib/bootm.c @@ -174,7 +174,7 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima /* * allow the PREP bootm subcommand, it is required for bootm to work * - * TODO: Andreas Bießmann <andreas.devel@googlemail.com> refactor the + * TODO: Andreas Bießmann <andreas@biessmann.org> refactor the * do_bootm_linux() for avr32 */ if (flag & BOOTM_STATE_OS_PREP) diff --git a/arch/avr32/lib/dram_init.c b/arch/avr32/lib/dram_init.c index 5078e77f17..79c2455bd6 100644 --- a/arch/avr32/lib/dram_init.c +++ b/arch/avr32/lib/dram_init.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2015 Andreas Bießmann <andreas.devel@googlemail.com> + * Copyright (C) 2015 Andreas Bießmann <andreas@biessmann.org> * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index f852a1f1bb..fe37d1fa2d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -145,7 +145,7 @@ config MIPS_BOOT_ENV_LEGACY Enable this option if you want U-Boot to hand over the Yamon-style environment to the kernel. Information like memory size, initrd address and size will be prepared as zero-terminated key/value list. - The address of the enviroment is stored in register $a2. + The address of the environment is stored in register $a2. config MIPS_BOOT_FDT bool "Hand over a flattened device tree to Linux kernel" diff --git a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c index 916451a2b0..455136c68c 100644 --- a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c @@ -1151,7 +1151,7 @@ phys_size_t initdram(int board_type) dram_size *= ranks; debug("dram_size = %lu\n", dram_size); - /* Start the SDRAM controler */ + /* Start the SDRAM controller */ mtsdram(DDR0_02, DDR0_02_START_ENCODE(1)); denali_wait_for_dlllock(); diff --git a/arch/powerpc/lib/stack.c b/arch/powerpc/lib/stack.c index 1985f0348d..7eccfe0e30 100644 --- a/arch/powerpc/lib/stack.c +++ b/arch/powerpc/lib/stack.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015 Andreas Bießmann <andreas.devel@googlemail.com> + * Copyright (c) 2015 Andreas Bießmann <andreas@biessmann.org> * * Copyright (c) 2011 The Chromium OS Authors. * (C) Copyright 2002-2006 diff --git a/board/altera/cyclone5-socdk/qts/pinmux_config.h b/board/altera/cyclone5-socdk/qts/pinmux_config.h index f1e6d2b0bc..2d123bac22 100644 --- a/board/altera/cyclone5-socdk/qts/pinmux_config.h +++ b/board/altera/cyclone5-socdk/qts/pinmux_config.h @@ -8,7 +8,7 @@ #define __SOCFPGA_PINMUX_CONFIG_H__ const u8 sys_mgr_init_table[] = { - 3, /* EMACIO0 */ + 0, /* EMACIO0 */ 2, /* EMACIO1 */ 2, /* EMACIO2 */ 2, /* EMACIO3 */ @@ -17,7 +17,7 @@ const u8 sys_mgr_init_table[] = { 2, /* EMACIO6 */ 2, /* EMACIO7 */ 2, /* EMACIO8 */ - 3, /* EMACIO9 */ + 0, /* EMACIO9 */ 2, /* EMACIO10 */ 2, /* EMACIO11 */ 2, /* EMACIO12 */ @@ -32,27 +32,27 @@ const u8 sys_mgr_init_table[] = { 0, /* FLASHIO1 */ 3, /* FLASHIO2 */ 3, /* FLASHIO3 */ - 3, /* FLASHIO4 */ - 3, /* FLASHIO5 */ - 3, /* FLASHIO6 */ - 3, /* FLASHIO7 */ + 0, /* FLASHIO4 */ + 0, /* FLASHIO5 */ + 0, /* FLASHIO6 */ + 0, /* FLASHIO7 */ 0, /* FLASHIO8 */ 3, /* FLASHIO9 */ 3, /* FLASHIO10 */ 3, /* FLASHIO11 */ - 0, /* GENERALIO0 */ - 1, /* GENERALIO1 */ - 1, /* GENERALIO2 */ - 0, /* GENERALIO3 */ - 0, /* GENERALIO4 */ - 1, /* GENERALIO5 */ - 1, /* GENERALIO6 */ - 1, /* GENERALIO7 */ - 1, /* GENERALIO8 */ - 0, /* GENERALIO9 */ - 0, /* GENERALIO10 */ - 0, /* GENERALIO11 */ - 0, /* GENERALIO12 */ + 3, /* GENERALIO0 */ + 3, /* GENERALIO1 */ + 3, /* GENERALIO2 */ + 3, /* GENERALIO3 */ + 3, /* GENERALIO4 */ + 3, /* GENERALIO5 */ + 3, /* GENERALIO6 */ + 3, /* GENERALIO7 */ + 3, /* GENERALIO8 */ + 3, /* GENERALIO9 */ + 3, /* GENERALIO10 */ + 3, /* GENERALIO11 */ + 3, /* GENERALIO12 */ 2, /* GENERALIO13 */ 2, /* GENERALIO14 */ 3, /* GENERALIO15 */ diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h b/board/altera/cyclone5-socdk/qts/pll_config.h index 4abd2e0aac..408235eb93 100644 --- a/board/altera/cyclone5-socdk/qts/pll_config.h +++ b/board/altera/cyclone5-socdk/qts/pll_config.h @@ -10,13 +10,13 @@ #define CONFIG_HPS_DBCTRL_STAYOSC1 1 #define CONFIG_HPS_MAINPLLGRP_VCO_DENOM 0 -#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER 63 +#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER 73 #define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT 0 #define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT 0 #define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT 0 -#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 3 +#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 4 #define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT 511 -#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 15 +#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 14 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK 1 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK 1 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK 1 @@ -27,26 +27,26 @@ #define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP 1 #define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP 1 -#define CONFIG_HPS_PERPLLGRP_VCO_DENOM 1 -#define CONFIG_HPS_PERPLLGRP_VCO_NUMER 79 +#define CONFIG_HPS_PERPLLGRP_VCO_DENOM 0 +#define CONFIG_HPS_PERPLLGRP_VCO_NUMER 39 #define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0 -#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3 +#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 511 #define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3 #define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511 #define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4 #define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4 #define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 511 #define CONFIG_HPS_PERPLLGRP_DIV_USBCLK 0 -#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK 4 +#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK 0 #define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK 1 -#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK 1 +#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK 4 #define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK 6249 #define CONFIG_HPS_PERPLLGRP_SRC_SDMMC 2 #define CONFIG_HPS_PERPLLGRP_SRC_NAND 2 #define CONFIG_HPS_PERPLLGRP_SRC_QSPI 1 -#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM 2 -#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER 79 +#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM 0 +#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER 31 #define CONFIG_HPS_SDRPLLGRP_VCO_SSRC 0 #define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT 1 #define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE 0 @@ -61,25 +61,25 @@ #define CONFIG_HPS_CLK_OSC2_HZ 25000000 #define CONFIG_HPS_CLK_F2S_SDR_REF_HZ 0 #define CONFIG_HPS_CLK_F2S_PER_REF_HZ 0 -#define CONFIG_HPS_CLK_MAINVCO_HZ 1600000000 +#define CONFIG_HPS_CLK_MAINVCO_HZ 1850000000 #define CONFIG_HPS_CLK_PERVCO_HZ 1000000000 -#define CONFIG_HPS_CLK_SDRVCO_HZ 666666666 -#define CONFIG_HPS_CLK_EMAC0_HZ 250000000 +#define CONFIG_HPS_CLK_SDRVCO_HZ 800000000 +#define CONFIG_HPS_CLK_EMAC0_HZ 1953125 #define CONFIG_HPS_CLK_EMAC1_HZ 250000000 #define CONFIG_HPS_CLK_USBCLK_HZ 200000000 #define CONFIG_HPS_CLK_NAND_HZ 50000000 #define CONFIG_HPS_CLK_SDMMC_HZ 200000000 -#define CONFIG_HPS_CLK_QSPI_HZ 400000000 +#define CONFIG_HPS_CLK_QSPI_HZ 370000000 #define CONFIG_HPS_CLK_SPIM_HZ 200000000 #define CONFIG_HPS_CLK_CAN0_HZ 100000000 -#define CONFIG_HPS_CLK_CAN1_HZ 100000000 +#define CONFIG_HPS_CLK_CAN1_HZ 12500000 #define CONFIG_HPS_CLK_GPIODB_HZ 32000 #define CONFIG_HPS_CLK_L4_MP_HZ 100000000 #define CONFIG_HPS_CLK_L4_SP_HZ 100000000 #define CONFIG_HPS_ALTERAGRP_MPUCLK 1 -#define CONFIG_HPS_ALTERAGRP_MAINCLK 3 -#define CONFIG_HPS_ALTERAGRP_DBGATCLK 3 +#define CONFIG_HPS_ALTERAGRP_MAINCLK 4 +#define CONFIG_HPS_ALTERAGRP_DBGATCLK 4 #endif /* __SOCFPGA_PLL_CONFIG_H__ */ diff --git a/board/atmel/at91rm9200ek/MAINTAINERS b/board/atmel/at91rm9200ek/MAINTAINERS index d2a479bbc3..b25bc58029 100644 --- a/board/atmel/at91rm9200ek/MAINTAINERS +++ b/board/atmel/at91rm9200ek/MAINTAINERS @@ -1,5 +1,5 @@ AT91RM9200EK BOARD -M: Andreas Bießmann <andreas.devel@gmail.com> +M: Andreas Bießmann <andreas@biessmann.org> S: Maintained F: board/atmel/at91rm9200ek/ F: include/configs/at91rm9200ek.h diff --git a/board/atmel/at91rm9200ek/at91rm9200ek.c b/board/atmel/at91rm9200ek/at91rm9200ek.c index 4ca8106c06..98d76a6fa7 100644 --- a/board/atmel/at91rm9200ek/at91rm9200ek.c +++ b/board/atmel/at91rm9200ek/at91rm9200ek.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010 Andreas Bießmann <andreas.devel@gmail.com> + * (C) Copyright 2010 Andreas Bießmann <andreas@biessmann.org> * * derived from previous work * diff --git a/board/atmel/at91rm9200ek/led.c b/board/atmel/at91rm9200ek/led.c index fbe8e3d22c..5986ac08f9 100644 --- a/board/atmel/at91rm9200ek/led.c +++ b/board/atmel/at91rm9200ek/led.c @@ -4,7 +4,7 @@ * Ulf Samuelsson <ulf@atmel.com> * * (C) Copyright 2010 - * Andreas Bießmann <andreas.devel@gmail.com> + * Andreas Bießmann <andreas@biessmann.org> * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/board/atmel/atngw100mkii/MAINTAINERS b/board/atmel/atngw100mkii/MAINTAINERS index 212363e4cf..54eb1da4c2 100644 --- a/board/atmel/atngw100mkii/MAINTAINERS +++ b/board/atmel/atngw100mkii/MAINTAINERS @@ -1,5 +1,5 @@ ATNGW100MKII BOARD -M: Andreas Bießmann <andreas.devel@googlemail.com> +M: Andreas Bießmann <andreas@biessmann.org> S: Maintained F: board/atmel/atngw100mkii/ F: include/configs/atngw100mkii.h diff --git a/board/atmel/atngw100mkii/atngw100mkii.c b/board/atmel/atngw100mkii/atngw100mkii.c index 8e215d5fcf..68662c4045 100644 --- a/board/atmel/atngw100mkii/atngw100mkii.c +++ b/board/atmel/atngw100mkii/atngw100mkii.c @@ -1,7 +1,7 @@ /* * Copyright (C) 2010 Atmel Corporation * - * Copyright (C) 2012 Andreas Bießmann <andreas.devel@googlemail.com> + * Copyright (C) 2012 Andreas Bießmann <andreas@biessmann.org> * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/board/bf533-ezkit/flash.c b/board/bf533-ezkit/flash.c index 3180a76fa6..a7b3519d95 100644 --- a/board/bf533-ezkit/flash.c +++ b/board/bf533-ezkit/flash.c @@ -320,7 +320,7 @@ int poll_toggle_bit(long lOffset) } timeout--; } - printf("Time out occured \n"); + printf("Time out occurred \n"); if (timeout < 0) return FLASH_FAIL; } diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 64e4e300a5..8c171b13ed 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -812,9 +812,9 @@ static int calculate_cmp_img_sig(struct fsl_secboot_img_priv *img) } /* haddr - Address of the header of image to be validated. * arg_hash_str - Option hash string. If provided, this - * overides the key hash in the SFP fuses. + * overrides the key hash in the SFP fuses. * img_addr_ptr - Optional pointer to address of image to be validated. - * If non zero addr, this overides the addr of image in header, + * If non zero addr, this overrides the addr of image in header, * otherwise updated to image addr in header. * Acts as both input and output of function. * This pointer shouldn't be NULL. diff --git a/board/freescale/mx28evk/README b/board/freescale/mx28evk/README index a248fb21df..b8bee8931c 100644 --- a/board/freescale/mx28evk/README +++ b/board/freescale/mx28evk/README @@ -45,7 +45,7 @@ or or -"make mx28evk_spi_config" - store enviroment variables into SPI NOR flash +"make mx28evk_spi_config" - store environment variables into SPI NOR flash Choose the target accordingly. diff --git a/board/in-circuit/grasshopper/MAINTAINERS b/board/in-circuit/grasshopper/MAINTAINERS index db8bd0a546..4abdea8da8 100644 --- a/board/in-circuit/grasshopper/MAINTAINERS +++ b/board/in-circuit/grasshopper/MAINTAINERS @@ -1,5 +1,5 @@ GRASSHOPPER BOARD -M: Andreas Bießmann <andreas.devel@googlemail.com> +M: Andreas Bießmann <andreas@biessmann.org> S: Maintained F: board/in-circuit/grasshopper/ F: include/configs/grasshopper.h diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index 7c7690ff55..1bd2fbfc58 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -777,7 +777,7 @@ void print_pip405_info (void) ((sysman & 0x10) == 0x10) ? "" : "not "); printf ("INIT asserts %sINT1# (NMI)\n", ((sysman & 0x20) == 0x20) ? "" : "not "); - printf ("INIT occured %d\n", (sysman >> 6) & 0x1); + printf ("INIT occurred %d\n", (sysman >> 6) & 0x1); printf ("SER1 is routed to %s\n", ((flashcom & 0x1) == 0x1) ? "RS485" : "RS232"); printf ("COM2 is routed to %s\n", diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c index 14f0ce5455..a66b710cdd 100644 --- a/board/nvidia/jetson-tk1/jetson-tk1.c +++ b/board/nvidia/jetson-tk1/jetson-tk1.c @@ -31,6 +31,9 @@ void pinmux_init(void) pinmux_config_drvgrp_table(jetson_tk1_drvgrps, ARRAY_SIZE(jetson_tk1_drvgrps)); + + pinmux_config_mipipadctrlgrp_table(jetson_tk1_mipipadctrlgrps, + ARRAY_SIZE(jetson_tk1_mipipadctrlgrps)); } #ifdef CONFIG_PCI_TEGRA diff --git a/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h b/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h index b2b2057e3b..00e0cdc4b8 100644 --- a/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h +++ b/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h @@ -276,7 +276,6 @@ static const struct pmux_pingrp_config jetson_tk1_pingrps[] = { PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PWR_INT_N, PMI, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(OWR, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, NORMAL), PINCFG(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), PINCFG(JTAG_RTCK, RTCK, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT), }; @@ -296,4 +295,15 @@ static const struct pmux_pingrp_config jetson_tk1_pingrps[] = { static const struct pmux_drvgrp_config jetson_tk1_drvgrps[] = { }; +#define MIPIPADCTRLCFG(_grp, _mux) \ + { \ + .grp = PMUX_MIPIPADCTRLGRP_##_grp, \ + .func = PMUX_FUNC_##_mux, \ + } + +static const struct pmux_mipipadctrlgrp_config jetson_tk1_mipipadctrlgrps[] = { + /* grp, mux */ + MIPIPADCTRLCFG(DSI_B, DSI_B), +}; + #endif /* PINMUX_CONFIG_JETSON_TK1_H */ diff --git a/board/tqc/tqm5200/cmd_stk52xx.c b/board/tqc/tqm5200/cmd_stk52xx.c index 9d2d5a8fa9..dc22ee4024 100644 --- a/board/tqc/tqm5200/cmd_stk52xx.c +++ b/board/tqc/tqm5200/cmd_stk52xx.c @@ -72,7 +72,7 @@ static int spi_transmit(unsigned char data) spi->dr = data; /* wait for SPI transmission completed */ while (!(spi->sr & 0x80)) { - if (spi->sr & 0x40) { /* if write collision occured */ + if (spi->sr & 0x40) { /* if write collision occurred */ int dummy; /* do dummy read to clear status register */ diff --git a/cmd/eeprom.c b/cmd/eeprom.c index 571240a99b..e5457ba0cf 100644 --- a/cmd/eeprom.c +++ b/cmd/eeprom.c @@ -37,6 +37,10 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 8 #endif +#ifndef I2C_RXTX_LEN +#define I2C_RXTX_LEN 128 +#endif + #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS) #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1)) @@ -189,7 +189,7 @@ int wait_for_fdc_int(void) while((read_fdc_reg(FDC_SRA)&0x80)==0) { timeout--; udelay(10); - if(timeout==0) /* timeout occured */ + if(timeout==0) /* timeout occurred */ return false; } return true; @@ -205,7 +205,7 @@ int read_fdc_byte(void) /* direction out and ready */ udelay(10); timeout--; - if(timeout==0) /* timeout occured */ + if(timeout==0) /* timeout occurred */ return -1; } return read_fdc_reg(FDC_FIFO); @@ -235,7 +235,7 @@ int write_fdc_byte(unsigned char val) timeout--; udelay(10); fdc_need_more_output(); - if(timeout==0) /* timeout occured */ + if(timeout==0) /* timeout occurred */ return false; } write_fdc_reg(FDC_FIFO,val); @@ -395,7 +395,7 @@ int fdc_terminate(FDC_COMMAND_STRUCT *pCMD) int i; for(i=0;i<100;i++) udelay(500); /* wait 500usec for fifo overrun */ - while((read_fdc_reg(FDC_SRA)&0x80)==0x00); /* wait as long as no int has occured */ + while((read_fdc_reg(FDC_SRA)&0x80)==0x00); /* wait as long as no int has occurred */ for(i=0;i<7;i++) { pCMD->result[i]=(unsigned char)read_fdc_byte(); } @@ -1055,7 +1055,7 @@ static char fdt_help_text[] = " <start> - addr of key blob\n" " default gd->fdt_blob\n" #endif - "NOTE: Dereference aliases by omiting the leading '/', " + "NOTE: Dereference aliases by omitting the leading '/', " "e.g. fdt print ethernet0."; #endif @@ -313,7 +313,7 @@ static int do_mmcrpmb(cmd_tbl_t *cmdtp, int flag, return CMD_RET_FAILURE; } /* Switch to the RPMB partition */ - original_part = mmc->block_dev.part_num; + original_part = mmc->block_dev.hwpart; if (mmc_select_hwpart(curr_device, MMC_PART_RPMB) != 0) return CMD_RET_FAILURE; ret = cp->cmd(cmdtp, flag, argc, argv); diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c index 86a4689616..44b2c3a5a9 100644 --- a/cmd/mtdparts.c +++ b/cmd/mtdparts.c @@ -1742,7 +1742,7 @@ int mtdparts_init(void) debug("last_partition : %s\n", last_partition); debug("env_partition : %s\n", current_partition); - /* if mtdids varible is empty try to use defaults */ + /* if mtdids variable is empty try to use defaults */ if (!ids) { if (mtdids_default) { debug("mtdids variable not defined, using default\n"); diff --git a/common/fdt_support.c b/common/fdt_support.c index ced119e70d..42e5d8a1d2 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -467,23 +467,31 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size) void fdt_fixup_ethernet(void *fdt) { - int node, i, j; + int i, j, prop; char *tmp, *end; char mac[16]; const char *path; unsigned char mac_addr[6]; int offset; - node = fdt_path_offset(fdt, "/aliases"); - if (node < 0) + if (fdt_path_offset(fdt, "/aliases") < 0) return; - for (offset = fdt_first_property_offset(fdt, node); - offset > 0; - offset = fdt_next_property_offset(fdt, offset)) { + /* Cycle through all aliases */ + for (prop = 0; ; prop++) { const char *name; int len = strlen("ethernet"); + /* FDT might have been edited, recompute the offset */ + offset = fdt_first_property_offset(fdt, + fdt_path_offset(fdt, "/aliases")); + /* Select property number 'prop' */ + for (i = 0; i < prop; i++) + offset = fdt_next_property_offset(fdt, offset); + + if (offset < 0) + break; + path = fdt_getprop_by_offset(fdt, offset, &name, NULL); if (!strncmp(name, "ethernet", len)) { i = trailing_strtol(name); diff --git a/common/kgdb.c b/common/kgdb.c index d357463695..daf53bed7a 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -326,7 +326,7 @@ handle_exception (struct pt_regs *regs) return (0); } - /* probably should check which exception occured as well */ + /* probably should check which exception occurred as well */ if (longjmp_on_fault) { longjmp_on_fault = 0; kgdb_longjmp(error_jmp_buf, KGDBERR_MEMFAULT); diff --git a/common/usb.c b/common/usb.c index 4d0de4d87e..8d9efe516b 100644 --- a/common/usb.c +++ b/common/usb.c @@ -1064,7 +1064,7 @@ static int usb_prepare_device(struct usb_device *dev, int addr, bool do_read, int usb_select_config(struct usb_device *dev) { - unsigned char *tmpbuf = 0; + unsigned char *tmpbuf = NULL; int err; err = get_descriptor_len(dev, USB_DT_DEVICE_SIZE, USB_DT_DEVICE_SIZE); @@ -1077,6 +1077,14 @@ int usb_select_config(struct usb_device *dev) le16_to_cpus(&dev->descriptor.idProduct); le16_to_cpus(&dev->descriptor.bcdDevice); + /* + * Kingston DT Ultimate 32GB USB 3.0 seems to be extremely sensitive + * about this first Get Descriptor request. If there are any other + * requests in the first microframe, the stick crashes. Wait about + * one microframe duration here (1mS for USB 1.x , 125uS for USB 2.0). + */ + mdelay(1); + /* only support for one config for now */ err = usb_get_configuration_len(dev, 0); if (err >= 0) { @@ -1107,6 +1115,14 @@ int usb_select_config(struct usb_device *dev) "len %d, status %lX\n", dev->act_len, dev->status); return err; } + + /* + * Wait until the Set Configuration request gets processed by the + * device. This is required by at least SanDisk Cruzer Pop USB 2.0 + * and Kingston DT Ultimate 32GB USB 3.0 on DWC2 OTG controller. + */ + mdelay(10); + debug("new device strings: Mfr=%d, Product=%d, SerialNumber=%d\n", dev->descriptor.iManufacturer, dev->descriptor.iProduct, dev->descriptor.iSerialNumber); diff --git a/common/usb_hub.c b/common/usb_hub.c index e6a2cdb6f8..0f39c9faf7 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -402,6 +402,7 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) free(usb_scan); return 0; } + return 0; } portstatus = le16_to_cpu(portsts->wPortStatus); @@ -475,7 +476,7 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) return 0; /* Otherwise the device will get removed */ - printf("Port %d over-current occured %d times\n", i + 1, + printf("Port %d over-current occurred %d times\n", i + 1, hub->overcurrent_count[i]); } diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index d2d0cbda6d..30ea836f39 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_GADGET=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index 0eca229d10..cbbec4706c 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -29,3 +29,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" CONFIG_G_DNL_VENDOR_NUM=0x1f3a CONFIG_G_DNL_PRODUCT_NUM=0x1010 +CONFIG_USB_EHCI_HCD=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index b64ea158ab..a17e9d0fd9 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index e1b0c07827..ad4fbbf606 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -22,3 +22,4 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_OF_LIBFDT=y diff --git a/doc/README.at91-soc b/doc/README.at91-soc index ab3f713422..9a9f74e234 100644 --- a/doc/README.at91-soc +++ b/doc/README.at91-soc @@ -40,7 +40,7 @@ The method for updating 4. Convert arch, driver and boards file to new SoC 5. remove legacy code, if all boards and drives are ready -2013-10-30 Andreas Bießmann <andreas.devel@googlemail.com>: +2013-10-30 Andreas Bießmann <andreas@biessmann.org>: The goal is almost reached, we could remove the CONFIG_AT91_LEGACY switch but remain the CONFIG_ATMEL_LEGACY switch until the GPIO disaster is fixed. The diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc index cc0f73db8f..274d860f06 100644 --- a/doc/README.atmel_pmecc +++ b/doc/README.atmel_pmecc @@ -30,7 +30,7 @@ Take AT91SAM9X5EK as an example, the board definition file likes: How to enable PMECC header for direct programmable boot.bin ----------------------------------------------------------- -2014-05-19 Andreas Bießmann <andreas.devel@googlemail.com> +2014-05-19 Andreas Bießmann <andreas@biessmann.org> The usual way to program SPL into NAND flash is to use the SAM-BA Atmel tool. This however is often not usable when doing field updates. To be able to diff --git a/doc/README.commands.spl b/doc/README.commands.spl index ac332731ee..cb3e0c8e0a 100644 --- a/doc/README.commands.spl +++ b/doc/README.commands.spl @@ -10,7 +10,7 @@ export has two subcommands: fdt: exports the FDT Call is: -spl export <ftd|atags> [kernel_addr] [initrd_addr] [fdt_addr if fdt] +spl export <fdt|atags> [kernel_addr] [initrd_addr] [fdt_addr if fdt] TYPICAL CALL diff --git a/doc/README.marubun-pcmcia b/doc/README.marubun-pcmcia index d3563a3cd9..0a363b2ada 100644 --- a/doc/README.marubun-pcmcia +++ b/doc/README.marubun-pcmcia @@ -34,7 +34,7 @@ U-Boot MARUBUN MR-SHPC-01 PCMCIA controller driver ex. #define CONFIG_PCMCIA_SLOT_A 1 * CONFIG_SYS_MARUBUN_MRSHPC - This is MR-SHPC-01 PCMCIA controler base address. + This is MR-SHPC-01 PCMCIA controller base address. You should do the setting matched to your environment. ex. #define CONFIG_SYS_MARUBUN_MRSHPC 0xb03fffe0 ( for MS7722SE01 environment ) diff --git a/doc/README.mxs b/doc/README.mxs index 6ea73b9d5b..4edf19faab 100644 --- a/doc/README.mxs +++ b/doc/README.mxs @@ -219,7 +219,7 @@ There are two possibilities when preparing an image writable to NAND flash. This script expects a working TFTP server containing the file "u-boot.nand" in it's root directory. This can be changed by - adjusting the "update_nand_full_filename" varible. + adjusting the "update_nand_full_filename" variable. To update the system, run the following in U-Boot prompt: @@ -242,7 +242,7 @@ There are two possibilities when preparing an image writable to NAND flash. This script expects a working TFTP server containing the file "u-boot.sb" in it's root directory. This can be changed by - adjusting the "update_nand_firmware_filename" varible. + adjusting the "update_nand_firmware_filename" variable. To update the system, run the following in U-Boot prompt: diff --git a/doc/SPI/README.sandbox-spi b/doc/SPI/README.sandbox-spi index bb73eaf288..dfa845cc82 100644 --- a/doc/SPI/README.sandbox-spi +++ b/doc/SPI/README.sandbox-spi @@ -1,7 +1,7 @@ Sandbox SPI/SPI Flash Implementation ==================================== -U-Boot supports SPI and SPI flash emuation in sandbox. This must be enabled +U-Boot supports SPI and SPI flash emulation in sandbox. This must be enabled using the --spi_sf paramter when starting U-Boot. For example: diff --git a/doc/SPI/README.ti_qspi_flash b/doc/SPI/README.ti_qspi_flash index 9064739c3e..5cc1fd03b6 100644 --- a/doc/SPI/README.ti_qspi_flash +++ b/doc/SPI/README.ti_qspi_flash @@ -31,7 +31,7 @@ Can be used in: Memory mapped read mode ----------------------- In this, SPI controller is configured using configuration port and then -controler is switched to memory mapped port for data read. +controller is switched to memory mapped port for data read. Driver ------ diff --git a/doc/git-mailrc b/doc/git-mailrc index 1201d4a970..1d6f4fcc7c 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -11,7 +11,7 @@ alias u-boot uboot # Maintainer aliases. Use the same alias here as patchwork to keep # things simple and easy to look up/coordinate. alias aaribaud Albert Aribaud <albert.u.boot@aribaud.net> -alias abiessmann Andreas Bießmann <andreas.devel@googlemail.com> +alias abiessmann Andreas Bießmann <andreas@biessmann.org> alias abrodkin Alexey Brodkin <alexey.brodkin@synopsys.com> alias afleming Andy Fleming <afleming@gmail.com> alias ag Anatolij Gustschin <agust@denx.de> diff --git a/doc/mkimage.1 b/doc/mkimage.1 index e0f210ab52..4b3a255255 100644 --- a/doc/mkimage.1 +++ b/doc/mkimage.1 @@ -97,8 +97,8 @@ Set XIP (execute in place) flag. .B Create FIT image: .TP -.BI "\-b -Specifies that the following arguments are device tree binary files (.dtb). +.BI "\-b [" "device tree file" "] +Appends the device tree binary file (.dtb) to the FIT. .TP .BI "\-c [" "comment" "]" @@ -211,7 +211,7 @@ automatic mode. No .its file is required. .B mkimage -f auto -A arm -O linux -T kernel -C none -a 43e00000 -e 0 \\\\ .br .B -c """Kernel 4.4 image for production devices""" -d vmlinuz \\\\ -.B -b /path/to/rk3288-firefly.dtb /path/to/rk3288-jerry.dtb kernel.itb +.B -b /path/to/rk3288-firefly.dtb -b /path/to/rk3288-jerry.dtb kernel.itb .fi .SH HOMEPAGE diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c index da44c3d8d9..a9a01b52d6 100644 --- a/drivers/bios_emulator/x86emu/decode.c +++ b/drivers/bios_emulator/x86emu/decode.c @@ -241,7 +241,7 @@ no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to addresses relative to SS (ie: on the stack). So, at the minimum, all decodings of addressing modes would have to set/clear a bit describing whether the access is relative to DS or SS. That is the function of the -cpu-state-varible M.x86.mode. There are several potential states: +cpu-state-variable M.x86.mode. There are several potential states: repe prefix seen (handled elsewhere) repne prefix seen (ditto) diff --git a/drivers/ddr/marvell/a38x/ddr3_init.h b/drivers/ddr/marvell/a38x/ddr3_init.h index cb3fb24416..8cb08864c2 100644 --- a/drivers/ddr/marvell/a38x/ddr3_init.h +++ b/drivers/ddr/marvell/a38x/ddr3_init.h @@ -120,7 +120,7 @@ #define MV_NO_RESOURCE (0x13) /* Resource not available (memory ...) */ #define MV_FULL (0x14) /* Item is full (Queue or table etc...) */ #define MV_EMPTY (0x15) /* Item is empty (Queue or table etc...) */ -#define MV_INIT_ERROR (0x16) /* Error occured while INIT process */ +#define MV_INIT_ERROR (0x16) /* Error occurred while INIT process */ #define MV_HW_ERROR (0x17) /* Hardware error */ #define MV_TX_ERROR (0x18) /* Transmit operation not succeeded */ #define MV_RX_ERROR (0x19) /* Recieve operation not succeeded */ diff --git a/drivers/ddr/marvell/axp/ddr3_hw_training.h b/drivers/ddr/marvell/axp/ddr3_hw_training.h index cffa7c4ff9..343a6b6672 100644 --- a/drivers/ddr/marvell/axp/ddr3_hw_training.h +++ b/drivers/ddr/marvell/axp/ddr3_hw_training.h @@ -41,7 +41,7 @@ #define MV_NO_RESOURCE (0x13) /* Resource not available (memory ...) */ #define MV_FULL (0x14) /* Item is full (Queue or table etc...) */ #define MV_EMPTY (0x15) /* Item is empty (Queue or table etc...) */ -#define MV_INIT_ERROR (0x16) /* Error occured while INIT process */ +#define MV_INIT_ERROR (0x16) /* Error occurred while INIT process */ #define MV_HW_ERROR (0x17) /* Hardware error */ #define MV_TX_ERROR (0x18) /* Transmit operation not succeeded */ #define MV_RX_ERROR (0x19) /* Recieve operation not succeeded */ diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig index 4fe22193b1..6b92064f0b 100644 --- a/drivers/dfu/Kconfig +++ b/drivers/dfu/Kconfig @@ -3,8 +3,8 @@ menu "DFU support" config DFU_TFTP bool "DFU via TFTP" help - This option allows performing update of DFU managed medium with data - send via TFTP boot. - Detailed description of this feature can be found at ./doc/README.dfutftp + This option allows performing update of DFU-managed medium with data + sent via TFTP boot. + Detailed description of this feature can be found at ./doc/README.dfutftp endmenu diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 8f5915e49c..20dfcbbf18 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -468,8 +468,10 @@ int dfu_config_entities(char *env, char *interface, char *devstr) s = strsep(&env, ";"); ret = dfu_fill_entity(&dfu[i], s, alt_num_cnt, interface, devstr); - if (ret) + if (ret) { + free(dfu); return -1; + } list_add_tail(&dfu[i].list, &dfu_list); alt_num_cnt++; diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c index 9af496bbb1..11f29d926d 100644 --- a/drivers/i2c/kona_i2c.c +++ b/drivers/i2c/kona_i2c.c @@ -381,7 +381,7 @@ static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev *dev, return -EREMOTEIO; } - /* Check if a timeout occured */ + /* Check if a timeout occurred */ if (!time_left) { printf("completion timed out\n"); return -EREMOTEIO; diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 4814fa202a..6a45d28a72 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -106,7 +106,7 @@ static uint32_t gen_true_ecc(uint8_t *ecc_buf) /* * omap_correct_data - Compares the ecc read from nand spare area with ECC - * registers values and corrects one bit error if it has occured + * registers values and corrects one bit error if it has occurred * Further details can be had from OMAP TRM and the following selected links: * http://en.wikipedia.org/wiki/Hamming_code * http://www.cs.utexas.edu/users/plaxton/c/337/05f/slides/ErrorCorrection-4.pdf @@ -479,7 +479,7 @@ static void omap_reverse_list(u8 *list, unsigned int length) /* * omap_correct_data_bch - Compares the ecc read from nand spare area - * with ECC registers values and corrects one bit error if it has occured + * with ECC registers values and corrects one bit error if it has occurred * * @mtd: MTD device structure * @dat: page data diff --git a/drivers/net/4xx_enet.c b/drivers/net/4xx_enet.c index 3c30f42b42..bc52ed35cc 100644 --- a/drivers/net/4xx_enet.c +++ b/drivers/net/4xx_enet.c @@ -1726,7 +1726,7 @@ static void mal_err (struct eth_device *dev, unsigned long isr, mtdcr (MAL0_RXDEIR, 0x80000000); #ifdef INFO_4XX_ENET - printf("\nMAL error occured.... ISR = %lx UIC = = %lx MAL_DEF = %lx MAL_ERR= %lx\n", + printf("\nMAL error occurred.... ISR = %lx UIC = = %lx MAL_DEF = %lx MAL_ERR= %lx\n", isr, uic, maldef, mal_errr); #endif @@ -1740,7 +1740,7 @@ static void emac_err (struct eth_device *dev, unsigned long isr) { EMAC_4XX_HW_PST hw_p = dev->priv; - printf ("EMAC%d error occured.... ISR = %lx\n", hw_p->devnum, isr); + printf ("EMAC%d error occurred.... ISR = %lx\n", hw_p->devnum, isr); out_be32((void *)EMAC0_ISR + hw_p->hw_addr, isr); } diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index 59ea11cd6a..611eabb546 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c @@ -381,7 +381,7 @@ static int enc_phy_link_wait(enc_dev_t *enc) udelay(1000); } - /* timeout occured */ + /* timeout occurred */ printf("%s: link down\n", enc->dev->name); return 1; } diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index bc7f8bb023..75b2b6b049 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -920,6 +920,7 @@ static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv) struct dpni_tx_conf_cfg tx_conf_cfg; int err = 0; + memset(&pools_params, 0, sizeof(pools_params)); pools_params.num_dpbp = 1; pools_params.pools[0].dpbp_id = (uint16_t)dflt_dpbp->dpbp_attr.id; pools_params.pools[0].buffer_size = LDPAA_ETH_RX_BUFFER_SIZE; diff --git a/drivers/net/macb.c b/drivers/net/macb.c index be0659a52c..4bf8fa45d7 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -120,7 +120,7 @@ static int macb_is_gem(struct macb_device *macb) static int gem_is_gigabit_capable(struct macb_device *macb) { /* - * The GEM controllers embeded in SAMA5D2 and SAMA5D4 are + * The GEM controllers embedded in SAMA5D2 and SAMA5D4 are * configured to support only 10/100. */ return macb_is_gem(macb) && !cpu_is_sama5d2() && !cpu_is_sama5d4(); diff --git a/drivers/net/ne2000_base.c b/drivers/net/ne2000_base.c index 71d133cc8f..67bf140a37 100644 --- a/drivers/net/ne2000_base.c +++ b/drivers/net/ne2000_base.c @@ -582,7 +582,7 @@ dp83902a_Overflow(void) /* * Read in as many packets as we can and acknowledge any and receive * interrupts. Since the buffer has overflowed, a receive event of - * some kind will have occured. + * some kind will have occurred. */ dp83902a_RxEvent(); DP_OUT(base, DP_ISR, DP_ISR_RxP|DP_ISR_RxE); @@ -592,7 +592,7 @@ dp83902a_Overflow(void) DP_OUT(base, DP_TCR, DP_TCR_NORMAL); /* - * If a transmit command was issued, but no transmit event has occured, + * If a transmit command was issued, but no transmit event has occurred, * restart it here. */ DP_IN(base, DP_ISR, isr); diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 443a4da527..2fa2016cdd 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -1,5 +1,5 @@ /* - * sh_eth.c - Driver for Renesas ethernet controler. + * sh_eth.c - Driver for Renesas ethernet controller. * * Copyright (C) 2008, 2011 Renesas Solutions Corp. * Copyright (c) 2008, 2011, 2014 2014 Nobuhiro Iwamatsu diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 5cb520c63e..3645f0eca7 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -1,5 +1,5 @@ /* - * sh_eth.h - Driver for Renesas SuperH ethernet controler. + * sh_eth.h - Driver for Renesas SuperH ethernet controller. * * Copyright (C) 2008 - 2012 Renesas Solutions Corp. * Copyright (c) 2008 - 2012 Nobuhiro Iwamatsu diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index 5dadf6fa62..c5b04daffa 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -275,12 +275,17 @@ static int tegra_pcie_conf_address(struct tegra_pcie *pcie, pci_dev_t bdf, return 0; } } + return -EFAULT; } else { +#ifdef CONFIG_TEGRA20 + unsigned int dev = PCI_DEV(bdf); + if (dev != 0) + return -EFAULT; +#endif + *address = pcie->cs.start + tegra_pcie_conf_offset(bdf, where); return 0; } - - return -EFAULT; } static int pci_tegra_read_config(struct udevice *bus, pci_dev_t bdf, @@ -299,13 +304,15 @@ static int pci_tegra_read_config(struct udevice *bus, pci_dev_t bdf, value = readl(address); +#ifdef CONFIG_TEGRA20 /* fixup root port class */ if (PCI_BUS(bdf) == 0) { - if (offset == PCI_CLASS_REVISION) { + if ((offset & ~3) == PCI_CLASS_REVISION) { value &= ~0x00ff0000; value |= PCI_CLASS_BRIDGE_PCI << 16; } } +#endif done: *valuep = pci_conv_32_to_size(value, offset, size); @@ -1041,11 +1048,3 @@ U_BOOT_DRIVER(pci_tegra) = { .probe = pci_tegra_probe, .priv_auto_alloc_size = sizeof(struct tegra_pcie), }; - -int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) -{ - if (PCI_BUS(dev) != 0 && PCI_DEV(dev) > 0) - return 1; - - return 0; -} diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 7786dd65f5..a71531d309 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -28,6 +28,7 @@ #include <common.h> #include <asm/io.h> #include <asm/errno.h> +#include <wait_bit.h> #include "cadence_qspi.h" #define CQSPI_REG_POLL_US (1) /* 1us */ @@ -192,128 +193,6 @@ static unsigned int cadence_qspi_apb_cmd2addr(const unsigned char *addr_buf, return addr; } -static void cadence_qspi_apb_read_fifo_data(void *dest, - const void *src_ahb_addr, unsigned int bytes) -{ - unsigned int temp; - int remaining = bytes; - unsigned int *dest_ptr = (unsigned int *)dest; - unsigned int *src_ptr = (unsigned int *)src_ahb_addr; - - while (remaining >= sizeof(dest_ptr)) { - *dest_ptr = readl(src_ptr); - remaining -= sizeof(src_ptr); - dest_ptr++; - } - if (remaining) { - /* dangling bytes */ - temp = readl(src_ptr); - memcpy(dest_ptr, &temp, remaining); - } - - return; -} - -static void cadence_qspi_apb_write_fifo_data(const void *dest_ahb_addr, - const void *src, unsigned int bytes) -{ - unsigned int temp = 0; - int i; - int remaining = bytes; - unsigned int *dest_ptr = (unsigned int *)dest_ahb_addr; - unsigned int *src_ptr = (unsigned int *)src; - - while (remaining >= CQSPI_FIFO_WIDTH) { - for (i = CQSPI_FIFO_WIDTH/sizeof(src_ptr) - 1; i >= 0; i--) - writel(*(src_ptr+i), dest_ptr+i); - src_ptr += CQSPI_FIFO_WIDTH/sizeof(src_ptr); - remaining -= CQSPI_FIFO_WIDTH; - } - if (remaining) { - /* dangling bytes */ - i = remaining/sizeof(dest_ptr); - memcpy(&temp, src_ptr+i, remaining % sizeof(dest_ptr)); - writel(temp, dest_ptr+i); - for (--i; i >= 0; i--) - writel(*(src_ptr+i), dest_ptr+i); - } - return; -} - -/* Read from SRAM FIFO with polling SRAM fill level. */ -static int qspi_read_sram_fifo_poll(const void *reg_base, void *dest_addr, - const void *src_addr, unsigned int num_bytes) -{ - unsigned int remaining = num_bytes; - unsigned int retry; - unsigned int sram_level = 0; - unsigned char *dest = (unsigned char *)dest_addr; - - while (remaining > 0) { - retry = CQSPI_REG_RETRY; - while (retry--) { - sram_level = CQSPI_GET_RD_SRAM_LEVEL(reg_base); - if (sram_level) - break; - udelay(1); - } - - if (!retry) { - printf("QSPI: No receive data after polling for %d times\n", - CQSPI_REG_RETRY); - return -1; - } - - sram_level *= CQSPI_FIFO_WIDTH; - sram_level = sram_level > remaining ? remaining : sram_level; - - /* Read data from FIFO. */ - cadence_qspi_apb_read_fifo_data(dest, src_addr, sram_level); - dest += sram_level; - remaining -= sram_level; - udelay(1); - } - return 0; -} - -/* Write to SRAM FIFO with polling SRAM fill level. */ -static int qpsi_write_sram_fifo_push(struct cadence_spi_platdata *plat, - const void *src_addr, unsigned int num_bytes) -{ - const void *reg_base = plat->regbase; - void *dest_addr = plat->ahbbase; - unsigned int retry = CQSPI_REG_RETRY; - unsigned int sram_level; - unsigned int wr_bytes; - unsigned char *src = (unsigned char *)src_addr; - int remaining = num_bytes; - unsigned int page_size = plat->page_size; - unsigned int sram_threshold_words = CQSPI_REG_SRAM_THRESHOLD_WORDS; - - while (remaining > 0) { - retry = CQSPI_REG_RETRY; - while (retry--) { - sram_level = CQSPI_GET_WR_SRAM_LEVEL(reg_base); - if (sram_level <= sram_threshold_words) - break; - } - if (!retry) { - printf("QSPI: SRAM fill level (0x%08x) not hit lower expected level (0x%08x)", - sram_level, sram_threshold_words); - return -1; - } - /* Write a page or remaining bytes. */ - wr_bytes = (remaining > page_size) ? - page_size : remaining; - - cadence_qspi_apb_write_fifo_data(dest_addr, src, wr_bytes); - src += wr_bytes; - remaining -= wr_bytes; - } - - return 0; -} - void cadence_qspi_apb_controller_enable(void *reg_base) { unsigned int reg; @@ -742,40 +621,84 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat, return 0; } +static u32 cadence_qspi_get_rd_sram_level(struct cadence_spi_platdata *plat) +{ + u32 reg = readl(plat->regbase + CQSPI_REG_SDRAMLEVEL); + reg >>= CQSPI_REG_SDRAMLEVEL_RD_LSB; + return reg & CQSPI_REG_SDRAMLEVEL_RD_MASK; +} + +static int cadence_qspi_wait_for_data(struct cadence_spi_platdata *plat) +{ + unsigned int timeout = 10000; + u32 reg; + + while (timeout--) { + reg = cadence_qspi_get_rd_sram_level(plat); + if (reg) + return reg; + udelay(1); + } + + return -ETIMEDOUT; +} + int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat, - unsigned int rxlen, u8 *rxbuf) + unsigned int n_rx, u8 *rxbuf) { - unsigned int reg; + unsigned int remaining = n_rx; + unsigned int bytes_to_read = 0; + int ret; - writel(rxlen, plat->regbase + CQSPI_REG_INDIRECTRDBYTES); + writel(n_rx, plat->regbase + CQSPI_REG_INDIRECTRDBYTES); /* Start the indirect read transfer */ writel(CQSPI_REG_INDIRECTRD_START_MASK, plat->regbase + CQSPI_REG_INDIRECTRD); - if (qspi_read_sram_fifo_poll(plat->regbase, (void *)rxbuf, - (const void *)plat->ahbbase, rxlen)) - goto failrd; + while (remaining > 0) { + ret = cadence_qspi_wait_for_data(plat); + if (ret < 0) { + printf("Indirect write timed out (%i)\n", ret); + goto failrd; + } - /* Check flash indirect controller */ - reg = readl(plat->regbase + CQSPI_REG_INDIRECTRD); - if (!(reg & CQSPI_REG_INDIRECTRD_DONE_MASK)) { - reg = readl(plat->regbase + CQSPI_REG_INDIRECTRD); - printf("QSPI: indirect completion status error with reg 0x%08x\n", - reg); + bytes_to_read = ret; + + while (bytes_to_read != 0) { + bytes_to_read *= CQSPI_FIFO_WIDTH; + bytes_to_read = bytes_to_read > remaining ? + remaining : bytes_to_read; + /* Handle non-4-byte aligned access to avoid data abort. */ + if (((uintptr_t)rxbuf % 4) || (bytes_to_read % 4)) + readsb(plat->ahbbase, rxbuf, bytes_to_read); + else + readsl(plat->ahbbase, rxbuf, bytes_to_read >> 2); + rxbuf += bytes_to_read; + remaining -= bytes_to_read; + bytes_to_read = cadence_qspi_get_rd_sram_level(plat); + } + } + + /* Check indirect done status */ + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_INDIRECTRD, + CQSPI_REG_INDIRECTRD_DONE_MASK, 1, 10, 0); + if (ret) { + printf("Indirect read completion error (%i)\n", ret); goto failrd; } /* Clear indirect completion status */ writel(CQSPI_REG_INDIRECTRD_DONE_MASK, plat->regbase + CQSPI_REG_INDIRECTRD); + return 0; failrd: /* Cancel the indirect read */ writel(CQSPI_REG_INDIRECTRD_CANCEL_MASK, plat->regbase + CQSPI_REG_INDIRECTRD); - return -1; + return ret; } /* Opcode + Address (3/4 bytes) */ @@ -810,48 +733,45 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, } int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat, - unsigned int txlen, const u8 *txbuf) + unsigned int n_tx, const u8 *txbuf) { - unsigned int reg = 0; - unsigned int retry; + unsigned int page_size = plat->page_size; + unsigned int remaining = n_tx; + unsigned int write_bytes; + int ret; /* Configure the indirect read transfer bytes */ - writel(txlen, plat->regbase + CQSPI_REG_INDIRECTWRBYTES); + writel(n_tx, plat->regbase + CQSPI_REG_INDIRECTWRBYTES); /* Start the indirect write transfer */ writel(CQSPI_REG_INDIRECTWR_START_MASK, plat->regbase + CQSPI_REG_INDIRECTWR); - if (qpsi_write_sram_fifo_push(plat, (const void *)txbuf, txlen)) - goto failwr; - - /* Wait until last write is completed (FIFO empty) */ - retry = CQSPI_REG_RETRY; - while (retry--) { - reg = CQSPI_GET_WR_SRAM_LEVEL(plat->regbase); - if (reg == 0) - break; - - udelay(1); - } - - if (reg != 0) { - printf("QSPI: timeout for indirect write\n"); - goto failwr; - } + while (remaining > 0) { + write_bytes = remaining > page_size ? page_size : remaining; + /* Handle non-4-byte aligned access to avoid data abort. */ + if (((uintptr_t)txbuf % 4) || (write_bytes % 4)) + writesb(plat->ahbbase, txbuf, write_bytes); + else + writesl(plat->ahbbase, txbuf, write_bytes >> 2); + + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_SDRAMLEVEL, + CQSPI_REG_SDRAMLEVEL_WR_MASK << + CQSPI_REG_SDRAMLEVEL_WR_LSB, 0, 10, 0); + if (ret) { + printf("Indirect write timed out (%i)\n", ret); + goto failwr; + } - /* Check flash indirect controller status */ - retry = CQSPI_REG_RETRY; - while (retry--) { - reg = readl(plat->regbase + CQSPI_REG_INDIRECTWR); - if (reg & CQSPI_REG_INDIRECTWR_DONE_MASK) - break; - udelay(1); + txbuf += write_bytes; + remaining -= write_bytes; } - if (!(reg & CQSPI_REG_INDIRECTWR_DONE_MASK)) { - printf("QSPI: indirect completion status error with reg 0x%08x\n", - reg); + /* Check indirect done status */ + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_INDIRECTWR, + CQSPI_REG_INDIRECTWR_DONE_MASK, 1, 10, 0); + if (ret) { + printf("Indirect write completion error (%i)\n", ret); goto failwr; } @@ -864,7 +784,7 @@ failwr: /* Cancel the indirect write */ writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK, plat->regbase + CQSPI_REG_INDIRECTWR); - return -1; + return ret; } void cadence_qspi_apb_enter_xip(void *reg_base, char xip_dummy) diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 3c6b36d1cf..8e22ea7060 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -1,7 +1,7 @@ config DM_THERMAL bool "Driver support for thermal devices" help - Enable support for temporary-sensing devices. Some SoCs have on-chip + Enable support for temperature-sensing devices. Some SoCs have on-chip temperature sensors to permit warnings, speed throttling or even automatic power-off when the temperature gets too high or low. Other devices may be discrete but connected on a suitable bus. diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c index 7d88008f74..8e7c981657 100644 --- a/drivers/usb/gadget/f_dfu.c +++ b/drivers/usb/gadget/f_dfu.c @@ -636,7 +636,7 @@ dfu_prepare_strings(struct f_dfu *f_dfu, int n) f_dfu->strings = calloc(sizeof(struct usb_string), n + 1); if (!f_dfu->strings) - goto enomem; + return -ENOMEM; for (i = 0; i < n; ++i) { de = dfu_get_entity(i); @@ -647,14 +647,6 @@ dfu_prepare_strings(struct f_dfu *f_dfu, int n) f_dfu->strings[i].s = NULL; return 0; - -enomem: - while (i) - f_dfu->strings[--i].s = NULL; - - free(f_dfu->strings); - - return -ENOMEM; } static int dfu_prepare_function(struct f_dfu *f_dfu, int n) diff --git a/drivers/usb/gadget/mpc8xx_udc.c b/drivers/usb/gadget/mpc8xx_udc.c index b3e178abef..ad5ea7a6b8 100644 --- a/drivers/usb/gadget/mpc8xx_udc.c +++ b/drivers/usb/gadget/mpc8xx_udc.c @@ -170,7 +170,7 @@ int udc_init (void) /* udc_irq * - * Poll for whatever events may have occured + * Poll for whatever events may have occurred */ void udc_irq (void) { diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index b2f4bc685a..d08879dc67 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -18,6 +18,8 @@ #include "dwc2.h" +DECLARE_GLOBAL_DATA_PTR; + /* Use only HC channel 0. */ #define DWC2_HC_CHANNEL 0 @@ -39,6 +41,8 @@ struct dwc2_priv { u8 out_data_toggle[MAX_DEVICE][MAX_ENDPOINT]; struct dwc2_core_regs *regs; int root_hub_devnum; + bool ext_vbus; + bool oc_disable; }; #ifndef CONFIG_DM_USB @@ -252,8 +256,9 @@ static void dwc_otg_core_host_init(struct dwc2_core_regs *regs) * * @param regs Programming view of the DWC_otg controller */ -static void dwc_otg_core_init(struct dwc2_core_regs *regs) +static void dwc_otg_core_init(struct dwc2_priv *priv) { + struct dwc2_core_regs *regs = priv->regs; uint32_t ahbcfg = 0; uint32_t usbcfg = 0; uint8_t brst_sz = CONFIG_DWC2_DMA_BURST_SIZE; @@ -262,13 +267,15 @@ static void dwc_otg_core_init(struct dwc2_core_regs *regs) usbcfg = readl(®s->gusbcfg); /* Program the ULPI External VBUS bit if needed */ -#ifdef CONFIG_DWC2_PHY_ULPI_EXT_VBUS - usbcfg |= (DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV | - DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR | - DWC2_GUSBCFG_INDICATOR_PASSTHROUGH); -#else - usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; -#endif + if (priv->ext_vbus) { + usbcfg |= DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; + if (!priv->oc_disable) { + usbcfg |= DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR | + DWC2_GUSBCFG_INDICATOR_PASSTHROUGH; + } + } else { + usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; + } /* Set external TS Dline pulsing */ #ifdef CONFIG_DWC2_TS_DLINE @@ -1056,7 +1063,13 @@ static int dwc2_init_common(struct dwc2_priv *priv) return -ENODEV; } - dwc_otg_core_init(regs); +#ifdef CONFIG_DWC2_PHY_ULPI_EXT_VBUS + priv->ext_vbus = 1; +#else + priv->ext_vbus = 0; +#endif + + dwc_otg_core_init(priv); dwc_otg_core_host_init(regs); clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA | @@ -1075,6 +1088,15 @@ static int dwc2_init_common(struct dwc2_priv *priv) } } + /* + * Add a 1 second delay here. This gives the host controller + * a bit time before the comminucation with the USB devices + * is started (the bus is scanned) and fixes the USB detection + * problems with some problematic USB keys. + */ + if (readl(®s->gintsts) & DWC2_GINTSTS_CURMODE_HOST) + mdelay(1000); + return 0; } @@ -1169,6 +1191,7 @@ static int dwc2_submit_int_msg(struct udevice *dev, struct usb_device *udev, static int dwc2_usb_ofdata_to_platdata(struct udevice *dev) { struct dwc2_priv *priv = dev_get_priv(dev); + const void *prop; fdt_addr_t addr; addr = dev_get_addr(dev); @@ -1176,12 +1199,20 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev) return -EINVAL; priv->regs = (struct dwc2_core_regs *)addr; + prop = fdt_getprop(gd->fdt_blob, dev->of_offset, "disable-over-current", + NULL); + if (prop) + priv->oc_disable = true; + return 0; } static int dwc2_usb_probe(struct udevice *dev) { struct dwc2_priv *priv = dev_get_priv(dev); + struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev); + + bus_priv->desc_before_addr = true; return dwc2_init_common(priv); } diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index a981b50fda..bb48d0dea0 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -254,7 +254,7 @@ static void usb_oc_config(int index) } /** - * board_ehci_hcd_init - override usb phy mode + * board_usb_phy_mode - override usb phy mode * @port: usb host/otg port * * Target board specific, override usb_phy_mode. @@ -310,6 +310,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, #endif struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR + (controller_spacing * index)); + int ret; if (index > 3) return -EINVAL; @@ -317,7 +318,9 @@ int ehci_hcd_init(int index, enum usb_init_type init, mdelay(1); /* Do board specific initialization */ - board_ehci_hcd_init(index); + ret = board_ehci_hcd_init(index); + if (ret) + return ret; usb_power_config(index); usb_oc_config(index); diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 9a3b61aa55..49479368d2 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -73,9 +73,9 @@ static void write_toggle(struct usb_device *dev, u8 ep, u8 dir_out) } /* - * This function checks if RxStall has occured on the endpoint. If a RxStall - * has occured, the RxStall is cleared and 1 is returned. If RxStall has - * not occured, 0 is returned. + * This function checks if RxStall has occurred on the endpoint. If a RxStall + * has occurred, the RxStall is cleared and 1 is returned. If RxStall has + * not occurred, 0 is returned. */ static u8 check_stall(u8 ep, u8 dir_out) { diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index 0ec843f6b3..bb5cc9788a 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -5,7 +5,7 @@ * minimal framebuffer driver for TI's AM335x SoC to be compatible with * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) * - * - supporting only 24bit RGB/TFT raster Mode (not using palette) + * - supporting 16/24/32bit RGB/TFT raster Mode (not using palette) * - sets up LCD controller as in 'am335x_lcdpanel' struct given * - starts output DMA from gd->fb_base buffer * @@ -106,6 +106,8 @@ int lcd_get_size(int *line_length) int am335xfb_init(struct am335x_lcdpanel *panel) { + u32 raster_ctrl = 0; + if (0 == gd->fb_base) { printf("ERROR: no valid fb_base stored in GLOBAL_DATA_PTR!\n"); return -1; @@ -115,6 +117,21 @@ int am335xfb_init(struct am335x_lcdpanel *panel) return -1; } + /* We can already set the bits for the raster_ctrl in this check */ + switch (panel->bpp) { + case 16: + break; + case 32: + raster_ctrl |= LCD_TFT_24BPP_UNPACK; + /* fallthrough */ + case 24: + raster_ctrl |= LCD_TFT_24BPP_MODE; + break; + default: + error("am335x-fb: invalid bpp value: %d\n", panel->bpp); + return -1; + } + debug("setting up LCD-Controller for %dx%dx%d (hfp=%d,hbp=%d,hsw=%d / ", panel->hactive, panel->vactive, panel->bpp, panel->hfp, panel->hbp, panel->hsw); @@ -126,6 +143,8 @@ int am335xfb_init(struct am335x_lcdpanel *panel) /* palette default entry */ memset((void *)gd->fb_base, 0, 0x20); *(unsigned int *)gd->fb_base = 0x4000; + /* point fb behind palette */ + gd->fb_base += 0x20; /* turn ON display through powercontrol function if accessible */ if (0 != panel->panel_power_ctrl) @@ -137,9 +156,9 @@ int am335xfb_init(struct am335x_lcdpanel *panel) lcdhw->raster_ctrl = 0; lcdhw->ctrl = LCD_CLK_DIVISOR(panel->pxl_clk_div) | LCD_RASTER_MODE; lcdhw->lcddma_fb0_base = gd->fb_base; - lcdhw->lcddma_fb0_ceiling = gd->fb_base + FBSIZE(panel) + 0x20; + lcdhw->lcddma_fb0_ceiling = gd->fb_base + FBSIZE(panel); lcdhw->lcddma_fb1_base = gd->fb_base; - lcdhw->lcddma_fb1_ceiling = gd->fb_base + FBSIZE(panel) + 0x20; + lcdhw->lcddma_fb1_ceiling = gd->fb_base + FBSIZE(panel); lcdhw->lcddma_ctrl = LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16); lcdhw->raster_timing0 = LCD_HORLSB(panel->hactive) | @@ -157,14 +176,11 @@ int am335xfb_init(struct am335x_lcdpanel *panel) LCD_HBPMSB(panel->hbp) | LCD_HFPMSB(panel->hfp) | 0x0000FF00; /* clk cycles for ac-bias */ - lcdhw->raster_ctrl = LCD_TFT_24BPP_MODE | - LCD_TFT_24BPP_UNPACK | + lcdhw->raster_ctrl = raster_ctrl | LCD_PALMODE_RAWDATA | LCD_TFT_MODE | LCD_RASTER_ENABLE; - gd->fb_base += 0x20; /* point fb behind palette */ - debug("am335x-fb: waiting picture to be stable.\n."); mdelay(panel->pon_delay); diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 84fba767c1..40b798a43f 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -2040,7 +2040,7 @@ static char *ext4fs_read_symlink(struct ext2fs_node *node) if (!symlink) return 0; - if (__le32_to_cpu(diro->inode.size) <= 60) { + if (__le32_to_cpu(diro->inode.size) < sizeof(diro->inode.b.symlink)) { strncpy(symlink, diro->inode.b.symlink, __le32_to_cpu(diro->inode.size)); } else { diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 94c8253e60..5249751830 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -83,7 +83,7 @@ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 3a733795ae..aaddfca2cd 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -85,7 +85,7 @@ #define CONFIG_PCI /* Enable PCI/PCIE */ #if defined(CONFIG_PCI) -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 4d14c8ba37..1e5b501ab1 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -92,7 +92,7 @@ #define CONFIG_PCI /* Enable PCI/PCIE */ #ifdef CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 8cc7f02391..03f17f9c35 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -51,9 +51,9 @@ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 6202dffaa5..26d92daff1 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -25,9 +25,9 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller 1 */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index dd07dc4fb5..5de8b19828 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -34,7 +34,7 @@ #define CONFIG_PCI /* enable any pci type devices */ #define CONFIG_PCI1 /* PCI controller 1 */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #undef CONFIG_PCI2 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 9144f321e0..8c4e5e21ca 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -40,9 +40,9 @@ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 88ca4f3048..e7f01d00d1 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -45,7 +45,7 @@ #define CONFIG_SYS_SCRATCH_VA 0xc0000000 #define CONFIG_PCI 1 /* Enable PCI/PCIE*/ -#define CONFIG_PCI1 1 /* PCI controler 1 */ +#define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */ #define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 3569849c52..2f94c8214e 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -46,8 +46,8 @@ #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (ULI bridge) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (ULI bridge) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL law init code */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 5719e86f1b..f398b37f5b 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -176,8 +176,8 @@ #define CONFIG_PCI /* Enable PCI/PCIE */ #if defined(CONFIG_PCI) -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b29951c98..7457dfcd48 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -134,9 +134,9 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index fcbe288472..a10310ec27 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -33,9 +33,9 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 /* PCIE controler 3 (slot 3) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 /* PCIE controller 3 (slot 3) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index b7a08e0a30..b3fb38c63a 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -52,9 +52,9 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 12260aaf62..ef2ede49b9 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -577,9 +577,9 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_PCI_INDIRECT_BRIDGE diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 74274cac57..778c64b3f0 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -563,11 +563,11 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #ifdef CONFIG_PPC_T1040 -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #endif #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 4c1175d426..be4ae712b5 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -65,10 +65,10 @@ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9a3965fa41..ed3493b684 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -130,10 +130,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 85df388b6f..d8c57a833b 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -550,10 +550,10 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCIE_RESET #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5e2d65975d..b6be46e004 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -500,10 +500,10 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index a0cce858a1..ab838a8036 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -92,9 +92,9 @@ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index cd8923d7a5..16935a105a 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -162,12 +162,9 @@ "if test $board_name = A335BONE; then " \ "setenv fdtfile am335x-bone.dtb; fi; " \ "if test $board_name = A335BNLT; then " \ - "if test $board_rev = BBG1; then " \ - "setenv fdtfile am335x-bonegreen.dtb; " \ - "else " \ - "setenv fdtfile am335x-boneblack.dtb; " \ - "fi; " \ - "fi; " \ + "setenv fdtfile am335x-boneblack.dtb; fi; " \ + "if test $board_name = BBG1; then " \ + "setenv fdtfile am335x-bonegreen.dtb; fi; " \ "if test $board_name = A33515BB; then " \ "setenv fdtfile am335x-evm.dtb; fi; " \ "if test $board_name = A335X_SK; then " \ diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h index fb12632923..dfa2d93a90 100644 --- a/include/configs/atngw100mkii.h +++ b/include/configs/atngw100mkii.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2006 Atmel Corporation * - * Copyright (C) 2012 Andreas Bießmann <andreas.devel@googlemail.com> + * Copyright (C) 2012 Andreas Bießmann <andreas@biessmann.org> * * Configuration settings for the AVR32 Network Gateway * diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 1bb8d93ba0..c60c644393 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -245,7 +245,7 @@ * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 96f17d3e7c..a06bfe05ad 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -67,8 +67,8 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 4280c9cfb4..660646eb91 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -59,8 +59,8 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/duovero.h b/include/configs/duovero.h index d8f48efdd8..98afe27287 100644 --- a/include/configs/duovero.h +++ b/include/configs/duovero.h @@ -22,6 +22,7 @@ #include <configs/ti_omap4_common.h> #undef CONFIG_SPL_OS_BOOT +#undef CONFIG_EFI_PARTITION #undef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 83d9e107fe..ffcc4d2630 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -121,7 +121,7 @@ "initrd_high=0xffffffffffffffff\0" \ BOOTENV -/* Preserve enviroment on sd card */ +/* Preserve environment on sd card */ #define CONFIG_COMMAND_HISTORY #define CONFIG_ENV_SIZE 0x1000 diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 9232ee32a7..028623d1ee 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -45,8 +45,8 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 3796395bd6..f605ca6280 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -528,8 +528,8 @@ unsigned long get_board_ddr_clk(void); /* PCIe */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 3e32128485..32d2acc0cd 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -377,8 +377,8 @@ /* PCIe */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 8e0b472fd7..a3aad1b99d 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -185,10 +185,10 @@ unsigned long long get_qixis_addr(void); #endif /* PCIe */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #ifdef CONFIG_LS2080A #define FSL_PCIE_COMPAT "fsl,ls2080a-pcie" diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 5da50a5094..9bd891586c 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -19,6 +19,13 @@ #include <configs/ti_omap3_common.h> #include <asm/mach-types.h> +/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */ +#undef CONFIG_SPL_MAX_SIZE +#undef CONFIG_SPL_TEXT_BASE + +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_TEXT_BASE 0x40200000 + /* * Display CPU and Board information */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 055dcb7c61..3c11e2acc2 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -34,7 +34,7 @@ #undef CONFIG_SPL_TEXT_BASE #undef CONFIG_SPL_MAX_SIZE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_SPL_MAX_SIZE (64 * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) /* Display CPU and Board information */ @@ -140,7 +140,7 @@ #define CONFIG_PREBOOT \ "echo ======================NOTICE============================;"\ "echo \"The u-boot environment is not set.\";" \ - "echo \"If using a display a valid display varible for your panel\";" \ + "echo \"If using a display a valid display variable for your panel\";" \ "echo \"needs to be set.\";" \ "echo \"Valid display options are:\";" \ "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index c066eae539..fbd0c2a070 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -12,9 +12,9 @@ #include <configs/ti_omap3_common.h> #undef CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_MAX_SIZE (64*1024) #undef CONFIG_SPL_TEXT_BASE #define CONFIG_SPL_TEXT_BASE 0x40200000 +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) #define CONFIG_BCH diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 596193d5c4..71b2fa9c07 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -306,8 +306,8 @@ #define CONFIG_FSL_ELBC #define CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index f2959c9b23..9b75afe92a 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -48,8 +48,8 @@ #define CONFIG_FSL_ELBC #define CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index 1f33bc62e2..816c571511 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -102,7 +102,7 @@ "run mmcboot;" \ "run nandboot;" -/* NS16550 Configuration: primary UART via FDTI */ +/* NS16550 Configuration: primary UART via FTDI */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index f34cef519c..a7c7aef71a 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -44,8 +44,8 @@ #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_PCI 1 /* Enable PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index af61f21693..8ce337e0a7 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -32,9 +32,9 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 2c7d5425ef..7db08813e4 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -219,8 +219,8 @@ #endif /* RAW SD card / eMMC locations. */ -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 /* address 0x40000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 /* 384 KB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ /* FAT sd card locations. */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 586d84886e..5fad3c1242 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -122,7 +122,10 @@ "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc${mmcdev} ...; " \ "run args_mmc; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ + "if run loadimage; then " \ + "run loadfdt; " \ + "bootz ${loadaddr} - ${fdtaddr}; " \ + "fi;\0" \ "uimageboot=echo Booting from mmc${mmcdev} ...; " \ "run args_mmc; " \ "bootm ${loadaddr}\0" \ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index af02efbdef..86c9b4c41f 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -30,8 +30,8 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index a1c5826f7b..6a06b0ab1c 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -30,8 +30,8 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 02685ca1a8..5b377e35ee 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -31,7 +31,7 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (PEX8112 or XMC) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (PEX8112 or XMC) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ diff --git a/include/env_flags.h b/include/env_flags.h index 9e87e1b7db..0dcec0689b 100644 --- a/include/env_flags.h +++ b/include/env_flags.h @@ -57,8 +57,8 @@ enum env_flags_varaccess { "gatewayip:i," \ "netmask:i," \ "serverip:i," \ - "nvlan:i," \ - "vlan:i," \ + "nvlan:d," \ + "vlan:d," \ "dnsip:i," #else #define ETHADDR_FLAGS diff --git a/include/fdtdec.h b/include/fdtdec.h index fb88273935..37d482aba7 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -570,7 +570,7 @@ int fdtdec_check_fdt(void); * @param id Compatible ID to look for * @param node_list Place to put list of found nodes * @param maxcount Maximum number of nodes to find - * @return number of nodes found on success, FTD_ERR_... on error + * @return number of nodes found on success, FDT_ERR_... on error */ int fdtdec_find_aliases_for_id(const void *blob, const char *name, enum fdt_compat_id id, int *node_list, int maxcount); diff --git a/include/linux/fb.h b/include/linux/fb.h index 652cf3bab7..fcf331b79f 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -388,14 +388,14 @@ struct fb_cursor_user { #define FB_EVENT_GET_CONSOLE_MAP 0x07 /* CONSOLE-SPECIFIC: set console to framebuffer mapping */ #define FB_EVENT_SET_CONSOLE_MAP 0x08 -/* A hardware display blank change occured */ +/* A hardware display blank change occurred */ #define FB_EVENT_BLANK 0x09 /* Private modelist is to be replaced */ #define FB_EVENT_NEW_MODELIST 0x0A /* The resolution of the passed in fb_info about to change and all vc's should be changed */ #define FB_EVENT_MODE_CHANGE_ALL 0x0B -/* A software display blank change occured */ +/* A software display blank change occurred */ #define FB_EVENT_CONBLANK 0x0C /* Get drawing requirements */ #define FB_EVENT_GET_REQ 0x0D diff --git a/include/linux/mtd/omap_gpmc.h b/include/linux/mtd/omap_gpmc.h index 6cbae45022..3a75674359 100644 --- a/include/linux/mtd/omap_gpmc.h +++ b/include/linux/mtd/omap_gpmc.h @@ -2,7 +2,7 @@ * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com> * Rohit Choraria <rohitkc@ti.com> * - * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com> + * (C) Copyright 2013 Andreas Bießmann <andreas@biessmann.org> * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/net.h b/include/net.h index 1fb419424b..05800c4422 100644 --- a/include/net.h +++ b/include/net.h @@ -465,20 +465,14 @@ struct icmp_hdr { #define IP_ICMP_HDR_SIZE (IP_HDR_SIZE + ICMP_HDR_SIZE) /* - * Maximum packet size; used to allocate packet storage. - * TFTP packets can be 524 bytes + IP header + ethernet header. - * Lets be conservative, and go for 38 * 16. (Must also be - * a multiple of 32 bytes). - */ -/* - * AS.HARNOIS : Better to set PKTSIZE to maximum size because - * traffic type is not always controlled - * maximum packet size = 1518 + * Maximum packet size; used to allocate packet storage. Use + * the maxium Ethernet frame size as specified by the Ethernet + * standard including the 802.1Q tag (VLAN tagging). + * maximum packet size = 1522 * maximum packet size and multiple of 32 bytes = 1536 */ -#define PKTSIZE 1518 +#define PKTSIZE 1522 #define PKTSIZE_ALIGN 1536 -/*#define PKTSIZE 608*/ /* * Maximum receive ring size; that is, the number of packets diff --git a/include/test/ut.h b/include/test/ut.h index da7c1a9d26..85434d785a 100644 --- a/include/test/ut.h +++ b/include/test/ut.h @@ -17,9 +17,9 @@ struct unit_test_state; * ut_fail() - Record failure of a unit test * * @uts: Test state - * @fname: Filename where the error occured - * @line: Line number where the error occured - * @func: Function name where the error occured + * @fname: Filename where the error occurred + * @line: Line number where the error occurred + * @func: Function name where the error occurred * @cond: The condition that failed */ void ut_fail(struct unit_test_state *uts, const char *fname, int line, @@ -29,9 +29,9 @@ void ut_fail(struct unit_test_state *uts, const char *fname, int line, * ut_failf() - Record failure of a unit test * * @uts: Test state - * @fname: Filename where the error occured - * @line: Line number where the error occured - * @func: Function name where the error occured + * @fname: Filename where the error occurred + * @line: Line number where the error occurred + * @func: Function name where the error occurred * @cond: The condition that failed * @fmt: printf() format string for the error, followed by args */ diff --git a/include/usbdevice.h b/include/usbdevice.h index da5af6efe4..f27e17f124 100644 --- a/include/usbdevice.h +++ b/include/usbdevice.h @@ -438,7 +438,7 @@ typedef enum usb_device_event { DEVICE_HUB_RESET, /* bi - bus has been unplugged */ DEVICE_DESTROY, /* bi - device instance should be destroyed */ - DEVICE_HOTPLUG, /* bi - a hotplug event has occured */ + DEVICE_HOTPLUG, /* bi - a hotplug event has occurred */ DEVICE_FUNCTION_PRIVATE, /* function - private */ diff --git a/lib/hang.c b/lib/hang.c index 8db268ef95..9246e12455 100644 --- a/lib/hang.c +++ b/lib/hang.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2013 - * Andreas Bießmann <andreas.devel@googlemail.com> + * Andreas Bießmann <andreas@biessmann.org> * * This file consolidates all the different hang() functions implemented in * u-boot. diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 44242842db..ec8d8f1b72 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -165,7 +165,7 @@ cmd_cat = cat $(filter-out $(PHONY), $^) > $@ quiet_cmd_copy = COPY $@ cmd_copy = cp $< $@ -ifeq ($(CONFIG_SPL_OF_CONTROL),y) +ifeq ($(CONFIG_SPL_OF_CONTROL)$(CONFIG_OF_SEPARATE),yy) $(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin $(obj)/$(SPL_BIN)-pad.bin \ $(obj)/$(SPL_BIN).dtb FORCE $(call if_changed,cat) diff --git a/test/py/tests/test_dfu.py b/test/py/tests/test_dfu.py index 8649d8731b..585e6b29d7 100644 --- a/test/py/tests/test_dfu.py +++ b/test/py/tests/test_dfu.py @@ -136,6 +136,8 @@ def test_dfu(u_boot_console, env__usb_dev_port, env__dfu_config): Nothing. """ + u_boot_utils.wait_until_file_open_fails( + env__usb_dev_port['host_usb_dev_node'], True) fh = u_boot_utils.attempt_to_open_file( env__usb_dev_port['host_usb_dev_node']) if fh: diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py index 72d24e42aa..9d243e047b 100644 --- a/test/py/u_boot_utils.py +++ b/test/py/u_boot_utils.py @@ -7,6 +7,7 @@ import hashlib import os import os.path +import pytest import sys import time diff --git a/tools/atmel_pmecc_params.c b/tools/atmel_pmecc_params.c index 8eaf27f804..eb97229bbc 100644 --- a/tools/atmel_pmecc_params.c +++ b/tools/atmel_pmecc_params.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2014 Andreas Bießmann <andreas.devel@googlemail.com> + * (C) Copyright 2014 Andreas Bießmann <andreas@biessmann.org> * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/tools/atmelimage.c b/tools/atmelimage.c index 6b5603eb87..9b3600d62d 100644 --- a/tools/atmelimage.c +++ b/tools/atmelimage.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2014 - * Andreas Bießmann <andreas.devel@googlemail.com> + * Andreas Bießmann <andreas@biessmann.org> * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 1420ac58a3..06cf63daa4 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -1325,6 +1325,9 @@ static int parse_config () struct stat st; #if defined(CONFIG_FILE) + if (!common_args.config_file) + common_args.config_file = CONFIG_FILE; + /* Fills in DEVNAME(), ENVSIZE(), DEVESIZE(). Or don't. */ if (get_config(common_args.config_file)) { fprintf(stderr, "Cannot parse config file '%s': %m\n", diff --git a/tools/fit_image.c b/tools/fit_image.c index ddefa72f34..0551572b04 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -343,7 +343,6 @@ static int fit_build(struct image_tool_params *params, const char *fname) if (ret != size) { fprintf(stderr, "%s: Can't write %s: %s\n", params->cmdname, fname, strerror(errno)); - close(fd); goto err; } close(fd); diff --git a/tools/mkimage.c b/tools/mkimage.c index 29317830d1..93d1c16c7c 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -85,8 +85,8 @@ static void usage(const char *msg) " -x ==> set XIP (execute in place)\n", params.cmdname); fprintf(stderr, - " %s [-D dtc_options] [-f fit-image.its|-f auto|-F] [-b <dtb_list>] fit-image\n" - " <dtb_list> is used with -f auto, and is a space-separated list of .dtb files\n", + " %s [-D dtc_options] [-f fit-image.its|-f auto|-F] [-b <dtb> [-b <dtb>]] fit-image\n" + " <dtb> file is used with -f auto, it may occour multiple times.\n", params.cmdname); fprintf(stderr, " -D => set all options for device tree compiler\n" @@ -133,12 +133,10 @@ static void process_args(int argc, char **argv) char *ptr; int type = IH_TYPE_INVALID; char *datafile = NULL; - int expecting; int opt; - expecting = IH_TYPE_COUNT; /* Unknown */ while ((opt = getopt(argc, argv, - "-a:A:bcC:d:D:e:Ef:Fk:K:ln:O:rR:sT:vVx")) != -1) { + "a:A:b:cC:d:D:e:Ef:Fk:K:ln:O:rR:sT:vVx")) != -1) { switch (opt) { case 'a': params.addr = strtoull(optarg, &ptr, 16); @@ -154,7 +152,12 @@ static void process_args(int argc, char **argv) usage("Invalid architecture"); break; case 'b': - expecting = IH_TYPE_FLATDT; + if (add_content(IH_TYPE_FLATDT, optarg)) { + fprintf(stderr, + "%s: Out of memory adding content '%s'", + params.cmdname, optarg); + exit(EXIT_FAILURE); + } break; case 'c': params.comment = optarg; @@ -232,7 +235,6 @@ static void process_args(int argc, char **argv) show_image_types(); usage("Invalid image type"); } - expecting = type; break; case 'v': params.vflag++; @@ -243,29 +245,15 @@ static void process_args(int argc, char **argv) case 'x': params.xflag++; break; - case 1: - if (expecting == type || optind == argc) { - params.imagefile = optarg; - expecting = IH_TYPE_INVALID; - } else if (expecting == IH_TYPE_INVALID) { - fprintf(stderr, - "%s: Unknown content type: use -b before device tree files", - params.cmdname); - exit(EXIT_FAILURE); - } else { - if (add_content(expecting, optarg)) { - fprintf(stderr, - "%s: Out of memory adding content '%s'", - params.cmdname, optarg); - exit(EXIT_FAILURE); - } - } - break; default: usage("Invalid option"); } } + /* The last parameter is expected to be the imagefile */ + if (optind < argc) + params.imagefile = argv[optind]; + /* * For auto-generated FIT images we need to know the image type to put * in the FIT, which is separate from the file's image type (which diff --git a/tools/moveconfig.py b/tools/moveconfig.py index 6f71b55363..68631b7fae 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -273,12 +273,12 @@ def log_msg(color_enabled, color, defconfig, msg): color_text(color_enabled, color, msg) + '\n' def update_cross_compile(): - """Update per-arch CROSS_COMPILE via enviroment variables + """Update per-arch CROSS_COMPILE via environment variables The default CROSS_COMPILE values are available in the CROSS_COMPILE list above. - You can override them via enviroment variables + You can override them via environment variables CROSS_COMPILE_{ARCH}. For example, if you want to override toolchain prefixes diff --git a/tools/tbot/README b/tools/tbot/README index a637a63d32..49b9e95f8f 100644 --- a/tools/tbot/README +++ b/tools/tbot/README @@ -92,6 +92,16 @@ https://github.com/hsdenx/tbot/blob/master/doc/tbot_structure.png ) It is possible to switch in a single TC between board states. +- Events + tbot creates while executing testcases so called events. + After tbot ended with the testcase it can call event_backends, + which convert the events to different formats. more info: + + https://github.com/hsdenx/tbot/blob/master/doc/README.event + + demo for a event backend: + http://xeidos.ddns.net/tests/test_db_auslesen.php + - tbot cmdline parameters: $ python2.7 src/common/tbot.py --help diff --git a/tools/tbot/README.install b/tools/tbot/README.install index 24c67bc661..a68e70524d 100644 --- a/tools/tbot/README.install +++ b/tools/tbot/README.install @@ -93,12 +93,6 @@ $ cp src/tc/tc_lab_denx_connect_to_board.py src/tc/tc_lab_denx_connect_to_board_XXX.py and adapt the commands to your needs. - As this TC powers on the board for all your boards in your VL, - you can differ between the boards through the tbot class - variable "tb.boardlabname" (which is in the default case the - same as "tb.boardname"), but you may need to name the power target - with an other name than boardname, so you can configure this case. - If connect fails end this TC with "tb.end_tc(False)" else call "tb.end_tc(True)" @@ -150,12 +144,6 @@ $ if (user == 'root'): password = '' - In the above example passwords for logging into the Lab PC tbot finds - through: - if (board == 'lab'): - user = 'name': - password = 'gnlmpf' # password 'gnlmpf' for login of user 'name' - - prepare board config file Each board which is found in the VL needs a tbot configuration file pass the config file name with the option '-c' to tbot, tbot searches @@ -187,13 +175,8 @@ $ keepalive message. line 14: channel_timeout: passed to paramiko line 15: loglevel: tbots loglevel for adding entries into the logfile. - line 16: lap_api: used lap API (currently only 'ssh_std') - Should be declared as standard -> this line would be not needed - longer. line 17: wdt_timeout: timeout in seconds for tbots watchdog. Watchdog gets triggered if prompt get read. - line 20,21: include 'ssh_std' api - should be removed. line 24: tc_lab_denx_connect_to_board_tc: Which TC is used for connecting to the boards console the TC, here: https://github.com/hsdenx/tbot/blob/master/src/tc/tc_workfd_connect_with_kermit.py @@ -215,156 +198,113 @@ TC (and hopefully share them), so continue with: u-boot:tools/tbot/README.create_a_new_testcase Heiko Schocher <hs@denx.de> -v1 2016.01.22 +v2 2016.04.26 -------------- [1] tbot Dokumentation: [2] u-boot:/tools/tbot/README https://github.com/hsdenx/tbot/blob/master/README.md + tbot-devel@googlegroups.com [3] Example for a first U-Boot TC which should always work: (with commandline option "-v" for verbose output): - -hs@localhost:tbot [master] $ python2.7 src/common/tbot.py -c tbot_dxr2.cfg -t tc_ub_setenv.py -v -l log/tbot.log +hs@localhost:tbot [event-devel] $ python2.7 src/common/tbot.py -c tbot_dxr2.cfg -t tc_ub_setenv.py -v -l log/tbot.log **** option cfg: tbot_dxr2.cfg log: log/tbot.log tc: tc_ub_setenv.py v 1 ('CUR WORK PATH: ', '/home/hs/data/Entwicklung/tbot') ('CFGFILE ', 'tbot_dxr2.cfg') ('LOGFILE ', '/home/hs/data/Entwicklung/tbot/log/tbot.log') -(<denx.tbot_lab_api object at 0x7f53ac1808d0>, <tbotlib.tbot object at 0x7f53a45fd410>, True) -(<denx.tbot_lab_api object at 0x7f53ac1808d0>, <tbotlib.tbot object at 0x7f53a45fd410>, True) -read 0: Last login: Fri Jan 22 12:20:12 2016 from 87.97.28.177 -read 0: -read 0: ************************************************************* -read 0: BDI2000 Assignment: (last updated: 2015-11-20 12:30 MET) -read 0: bdi1 => techem bdi2 => cetec_mx25 bdi3 => lpc3250 -read 0: bdi4 => - bdi5 => --Rev.B!-- bdi6 => tqm5200s -read 0: bdi7 => [stefano] bdi8 => smartweb bdi9 => sigmatek-nand -read 0: bdi10 => pcm052 bdi11 => socrates bdi12 => aristainetos -read 0: bdi13 => imx53 bdi14 => ib8315 bdi15 => cairo -read 0: bdi16 => g2c1 bdi17 => lwe090 bdi18 => symphony -read 0: bdi19 => dxr2 bdi20 => ima3-mx6 bdi21 => sama5d3 -read 0: bdi98 => - bdi99 => - bdi0 => - -read 0: Please power off unused systems when you leave! Thanks, wd. -read 0: ************************************************************* -read no ret 0: -pollux:~ hs $ -write 0: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >" -read 0: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >" -read 0: hs@pollux [12:21:00] ttbott > -read 1: Last login: Fri Jan 22 12:20:59 2016 from 87.97.28.177 -read 1: -read 1: ************************************************************* -read 1: BDI2000 Assignment: (last updated: 2015-11-20 12:30 MET) -read 1: bdi1 => techem bdi2 => cetec_mx25 bdi3 => lpc3250 -read 1: bdi4 => - bdi5 => --Rev.B!-- bdi6 => tqm5200s -read 1: bdi7 => [stefano] bdi8 => smartweb bdi9 => sigmatek-nand -read 1: bdi10 => pcm052 bdi11 => socrates bdi12 => aristainetos -read 1: bdi13 => imx53 bdi14 => ib8315 bdi15 => cairo -read 1: bdi16 => g2c1 bdi17 => lwe090 bdi18 => symphony -read 1: bdi19 => dxr2 bdi20 => ima3-mx6 bdi21 => sama5d3 -read 1: bdi98 => - bdi99 => - bdi0 => - -read 1: Please power off unused systems when you leave! Thanks, wd. -read 1: ************************************************************* -read no ret 1: -pollux:~ hs $ -write 1: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >" -read 1: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >" -read 1: hs@pollux [12:21:02] ttbott > -write 0: remote_power dxr2 -l -read 0: hs@pollux [12:21:00] ttbott >remote_power dxr2 -l -read 0: dxr2 ON -read 0: hs@pollux [12:21:02] ttbott > -read no ret 1: -hs@pollux [12:21:02] ttbott > -write 1: ssh hs@lena -read 1: ssh hs@lena -read no ret 1: -hs@lena's password: -read 1: -read 1: Last login: Fri Jan 22 12:20:17 2016 from 192.168.1.1 -read 1: -read no ret 1: -[hs@lena ~]$ -write 1: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >" -read 1: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >" -read 1: hs@lena [12:21:07] ttbott > -read no ret 1: -hs@lena [12:21:07] ttbott > -write 1: stty cols 200 -read 1: stty cols 200 -read 1: hs@lena [12:21:08] ttbott > -write 1: export TERM=vt200 -read 1: hs@lena [12:21:08] ttbott >export TERM=vt200 -read 1: hs@lena [12:21:08] ttbott > -write 1: echo $COLUMNS -read 1: hs@lena [12:21:08] ttbott >echo $COLUMNS -read 1: 200 -read 1: hs@lena [12:21:08] ttbott > -write 1: kermit -read 1: hs@lena [12:21:08] ttbott >kermit -read 1: C-Kermit 8.0.211, 10 Apr 2004, for Linux -read 1: -read 1: Copyright (C) 1985, 2004, -read 1: Trustees of Columbia University in the City of New York. -read 1: Type ? or HELP for help. -read 1: -read 1: (/home/hs/) C-Kermit> -read 1: -read no ret 1: (/home/hs/) C-Kermit> -write 1: set line /dev/ttyUSB0 -read 1: set line /dev/ttyUSB0 -read 1: -read 1: (/home/hs/) C-Kermit> -write 1: set speed 115200 -read 1: -read 1: (/home/hs/) C-Kermit>set speed 115200 -read 1: /dev/ttyUSB0, 115200 bps -read 1: -read 1: (/home/hs/) C-Kermit> -write 1: set flow-control none -read 1: -read 1: (/home/hs/) C-Kermit>set flow-control none -read 1: -read 1: (/home/hs/) C-Kermit> -write 1: set carrier-watch off -read 1: -read 1: (/home/hs/) C-Kermit>set carrier-watch off -read 1: -read 1: (/home/hs/) C-Kermit> -write 1: connect -read 1: -read 1: (/home/hs/) C-Kermit>connect -read 1: Connecting to /dev/ttyUSB0, speed 115200 -read 1: -read 1: Escape character: Ctrl-\ (ASCII 28, FS): enabled -read 1: -read 1: Type the escape character followed by C to get back, -read 1: -read 1: or followed by ? to see other options. -read 1: -read 1: ---------------------------------------------------- -read no ret 1: - -write no ret 1: - -read 1: -read 1: Heiko=Schocher -read no ret 1: +tb_ctrl: Last login: Mon Apr 25 14:52:42 2016 from 87.97.29.27 +************************************************************* +BDI2000 Assignment: (last updated: 2015-11-20 12:30 MET) +bdi1 => techem bdi2 => cetec_mx25 bdi3 => lpc3250 +bdi4 => - bdi5 => --Rev.B!-- bdi6 => tqm5200s +bdi7 => [stefano] bdi8 => smartweb bdi9 => sigmatek-nand +bdi10 => pcm052 bdi11 => socrates bdi12 => aristainetos +bdi13 => imx53 bdi14 => ib8315 bdi15 => cairo +bdi16 => g2c1 bdi17 => lwe090 bdi18 => symphony +bdi19 => dxr2 bdi20 => ima3-mx6 bdi21 => sama5d3 +bdi98 => - bdi99 => - bdi0 => - +Please power off unused systems when you leave! Thanks, wd. +************************************************************* +tb_ctrl: pollux:~ hs $ +tb_ctrl: export PS1=ttbott +ttbott +tb_ctrl: stty cols 200 +ttbott +tb_ctrl: export TERM=vt200 +ttbott +tb_ctrl: echo $COLUMNS +200 +ttbott +tb_con: Last login: Tue Apr 26 06:28:59 2016 from 87.97.29.27 +************************************************************* +BDI2000 Assignment: (last updated: 2015-11-20 12:30 MET) +bdi1 => techem bdi2 => cetec_mx25 bdi3 => lpc3250 +bdi4 => - bdi5 => --Rev.B!-- bdi6 => tqm5200s +bdi7 => [stefano] bdi8 => smartweb bdi9 => sigmatek-nand +bdi10 => pcm052 bdi11 => socrates bdi12 => aristainetos +bdi13 => imx53 bdi14 => ib8315 bdi15 => cairo +bdi16 => g2c1 bdi17 => lwe090 bdi18 => symphony +bdi19 => dxr2 bdi20 => ima3-mx6 bdi21 => sama5d3 +bdi98 => - bdi99 => - bdi0 => - +Please power off unused systems when you leave! Thanks, wd. +************************************************************* +tb_con: pollux:~ hs $ +tb_con: export PS1=ttbot +tb_con: t +ttbott +tb_con: stty cols 200 +ttbott +tb_con: export TERM=vt200 +ttbott +tb_con: echo $COLUMNS +200 +ttbott +tb_con: ssh hs@lena +tb_con: hs@lena's password: +tb_con: +tb_con: Last login: Mon Apr 25 07:03:29 2016 from 192.168.1.1 +tb_con: [hs@lena ~]$ +tb_con: export PS1=ttbott +ttbott +tb_con: stty cols 200 +ttbott +tb_con: export TERM=vt200 +ttbott +tb_con: echo $COLUMNS +200 +ttbott +tb_con: kermit +C-Kermit 8.0.211, 10 Apr 2004, for Linux + Copyright (C) 1985, 2004, + Trustees of Columbia University in the City of New York. +Type ? or HELP for help. +(/home/hs/) C-Kermit> +tb_con: set line /dev/ttyUSB0 +(/home/hs/) C-Kermit> +tb_con: set speed 115200 +/dev/ttyUSB0, 115200 bps +(/home/hs/) C-Kermit> +tb_con: set flow-control none +(/home/hs/) C-Kermit> +tb_con: set carrier-watch off +(/home/hs/) C-Kermit> +tb_con: connect +Connecting to /dev/ttyUSB0, speed 115200 + Escape character: Ctrl-\ (ASCII 28, FS): enabled +Type the escape character followed by C to get back, +or followed by ? to see other options. +---------------------------------------------------- +tb_con: <INTERRUPT> +U-Boot# +tb_con: U-Boot# U-Boot# -write no ret 1: -write no ret 1: - -read 1: <INTERRUPT> -read 1: U-Boot# -write 1: setenv Heiko Schocher -read 1: U-Boot# setenv Heiko Schocher -read no ret 1: +tb_con: setenv Heiko Schocher U-Boot# -write 1: printenv Heiko -read 1: printenv Heiko -read 1: Heiko=Schocher -read no ret 1: +tb_con: printenv Heiko +Heiko=Schocher U-Boot# +[('tc_workfd_ssh.py', 1, 0), ('tc_workfd_connect_with_kermit.py', 1, 0), ('tc_ub_setenv.py', 1, 0)] End of TBOT: success -hs@localhost:tbot [master] $ +hs@localhost:tbot [event-devel] $ |
