diff options
| author | Igor Grinberg <grinberg@compulab.co.il> | 2014-11-03 11:32:27 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-11-06 11:04:42 -0500 |
| commit | 40bbd52a79bdf2175a2e44272bead2bc194a3293 (patch) | |
| tree | fa8d81cb78135abc1ab3dc0b00f4324231d475cc | |
| parent | a8a78c74506454cc4a82493776e8b82eec56a755 (diff) | |
| download | blackbird-obmc-uboot-40bbd52a79bdf2175a2e44272bead2bc194a3293.tar.gz blackbird-obmc-uboot-40bbd52a79bdf2175a2e44272bead2bc194a3293.zip | |
omap3: cm-t3517: add LCD/DVI and splash support
Add support for splash screen on both DVI and SCF0403 LCD.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
| -rw-r--r-- | board/compulab/cm_t3517/mux.c | 44 | ||||
| -rw-r--r-- | include/configs/cm_t3517.h | 15 |
2 files changed, 59 insertions, 0 deletions
diff --git a/board/compulab/cm_t3517/mux.c b/board/compulab/cm_t3517/mux.c index cb54c2c6bc..88ce2cc2e6 100644 --- a/board/compulab/cm_t3517/mux.c +++ b/board/compulab/cm_t3517/mux.c @@ -85,6 +85,10 @@ void set_muxconf_regs(void) /* SB-T35 Ethernet */ MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); + /* DVI enable */ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | DIS | M4));/*GPIO_54*/ + /* DataImage backlight */ + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | DIS | M4));/*GPIO_58*/ /* SB-T35 SD/MMC WP GPIO59 */ MUX_VAL(CP(GPMC_CLK), (IEN | PTU | EN | M4)); /*GPIO_59*/ @@ -124,6 +128,36 @@ void set_muxconf_regs(void) MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); + /* DSS */ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)); + /* I2C */ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)); MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)); @@ -150,8 +184,18 @@ void set_muxconf_regs(void) /* Green LED GPIO186 */ MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTU | DIS | M4)); /*GPIO_186*/ + /* SPI */ + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M1)); /*MCSPI4_CLK*/ + MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M1)); /*MCSPI4_SIMO*/ + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M1)); /*MCSPI4_SOMI*/ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTU | EN | M1)); /*MCSPI4_CS0*/ + /* LCD reset GPIO157 */ + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | DIS | M4)); /*GPIO_157*/ + /* RTC V3020 CS Enable GPIO160 */ MUX_VAL(CP(MCBSP_CLKS), (IEN | PTD | EN | M4)); /*GPIO_160*/ + /* SB-T35 LVDS Transmitter SHDN GPIO162 */ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTU | DIS | M4)); /*GPIO_162*/ /* USB0 - mUSB */ MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)); diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index e623aac7f5..918032bd75 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -302,4 +302,19 @@ #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ #endif +/* Display Configuration */ +#define CONFIG_OMAP3_GPIO_2 +#define CONFIG_OMAP3_GPIO_5 +#define CONFIG_VIDEO_OMAP3 +#define LCD_BPP LCD_COLOR16 + +#define CONFIG_LCD +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASHIMAGE_GUARD +#define CONFIG_CMD_BMP +#define CONFIG_BMP_16BPP +#define CONFIG_SCF0403_LCD + +#define CONFIG_OMAP3_SPI + #endif /* __CONFIG_H */ |
