blob: a22ffe633b49b36a3f0d49a243ef7e04841f1af2 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
|
/*
* linux/arch/arm/boot/nspire.dtsi
*
* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2, as
* published by the Free Software Foundation.
*
*/
/include/ "skeleton.dtsi"
/ {
interrupt-parent = <&intc>;
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
};
};
bootrom: bootrom@00000000 {
reg = <0x00000000 0x80000>;
};
sram: sram@A4000000 {
device = "memory";
reg = <0xA4000000 0x20000>;
};
timer_clk: timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
};
base_clk: base_clk {
#clock-cells = <0>;
reg = <0x900B0024 0x4>;
};
ahb_clk: ahb_clk {
#clock-cells = <0>;
reg = <0x900B0024 0x4>;
clocks = <&base_clk>;
};
apb_pclk: apb_pclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <2>;
clock-mult = <1>;
clocks = <&ahb_clk>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
spi: spi@A9000000 {
reg = <0xA9000000 0x1000>;
};
usb0: usb@B0000000 {
reg = <0xB0000000 0x1000>;
interrupts = <8>;
};
usb1: usb@B4000000 {
reg = <0xB4000000 0x1000>;
interrupts = <9>;
status = "disabled";
};
lcd: lcd@C0000000 {
compatible = "arm,pl111", "arm,primecell";
reg = <0xC0000000 0x1000>;
interrupts = <21>;
clocks = <&apb_pclk>;
clock-names = "apb_pclk";
};
adc: adc@C4000000 {
reg = <0xC4000000 0x1000>;
interrupts = <11>;
};
tdes: crypto@C8010000 {
reg = <0xC8010000 0x1000>;
};
sha256: crypto@CC000000 {
reg = <0xCC000000 0x1000>;
};
apb@90000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
clock-ranges;
ranges;
gpio: gpio@90000000 {
reg = <0x90000000 0x1000>;
interrupts = <7>;
};
fast_timer: timer@90010000 {
reg = <0x90010000 0x1000>;
interrupts = <17>;
};
uart: serial@90020000 {
reg = <0x90020000 0x1000>;
interrupts = <1>;
};
timer0: timer@900C0000 {
reg = <0x900C0000 0x1000>;
clocks = <&timer_clk>;
};
timer1: timer@900D0000 {
reg = <0x900D0000 0x1000>;
interrupts = <19>;
clocks = <&timer_clk>;
};
watchdog: watchdog@90060000 {
compatible = "arm,amba-primecell";
reg = <0x90060000 0x1000>;
interrupts = <3>;
};
rtc: rtc@90090000 {
reg = <0x90090000 0x1000>;
interrupts = <4>;
};
misc: misc@900A0000 {
reg = <0x900A0000 0x1000>;
};
pwr: pwr@900B0000 {
reg = <0x900B0000 0x1000>;
interrupts = <15>;
};
keypad: input@900E0000 {
compatible = "ti,nspire-keypad";
reg = <0x900E0000 0x1000>;
interrupts = <16>;
scan-interval = <1000>;
row-delay = <200>;
clocks = <&apb_pclk>;
};
contrast: contrast@900F0000 {
reg = <0x900F0000 0x1000>;
};
led: led@90110000 {
reg = <0x90110000 0x1000>;
};
};
};
};
|
