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/*
* DTS file for CSR SiRFmarco Evaluation Board
*
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "marco.dtsi"
/ {
model = "CSR SiRFmarco Evaluation Board";
compatible = "sirf,marco-cb", "sirf,marco";
memory {
reg = <0x40000000 0x60000000>;
};
axi {
peri-iobg {
uart1: uart@cc060000 {
status = "okay";
};
uart2: uart@cc070000 {
status = "okay";
};
i2c0: i2c@cc0e0000 {
status = "okay";
fpga-cpld@4d {
compatible = "sirf,fpga-cpld";
reg = <0x4d>;
};
};
spi1: spi@cc170000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins_a>;
spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
pci-iobg {
sd0: sdhci@cd000000 {
bus-width = <8>;
status = "okay";
};
};
};
};
};
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